331693129d
On BF561 EBIU_SDGCTL bit 31 controls the SDRAM external data path width, typically set 0 for a 32-bit bus width. On other Blackfin derivatives this bit should be set by default. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org> |
||
---|---|---|
.. | ||
asm |