2ec5be3dbf
System register accesses also use zero register for Rt == 31, and therefore using it will also result in getting SP value instead. This patch makes them also using new accessors, introduced by the previous patch. Since register value is no longer directly associated with storage inside vCPU context structure, we introduce a dedicated storage for it in struct sys_reg_params. This refactor also gets rid of "massive hack" in kvm_handle_cp_64(). Signed-off-by: Pavel Fedin <p.fedin@samsung.com> Reviewed-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
146 lines
3.8 KiB
C
146 lines
3.8 KiB
C
/*
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* Copyright (C) 2012,2013 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*
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* Derived from arch/arm/kvm/coproc.h
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* Copyright (C) 2012 - Virtual Open Systems and Columbia University
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* Authors: Christoffer Dall <c.dall@virtualopensystems.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __ARM64_KVM_SYS_REGS_LOCAL_H__
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#define __ARM64_KVM_SYS_REGS_LOCAL_H__
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struct sys_reg_params {
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u8 Op0;
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u8 Op1;
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u8 CRn;
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u8 CRm;
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u8 Op2;
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u64 regval;
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bool is_write;
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bool is_aarch32;
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bool is_32bit; /* Only valid if is_aarch32 is true */
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};
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struct sys_reg_desc {
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/* MRS/MSR instruction which accesses it. */
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u8 Op0;
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u8 Op1;
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u8 CRn;
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u8 CRm;
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u8 Op2;
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/* Trapped access from guest, if non-NULL. */
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bool (*access)(struct kvm_vcpu *,
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struct sys_reg_params *,
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const struct sys_reg_desc *);
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/* Initialization for vcpu. */
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void (*reset)(struct kvm_vcpu *, const struct sys_reg_desc *);
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/* Index into sys_reg[], or 0 if we don't need to save it. */
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int reg;
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/* Value (usually reset value) */
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u64 val;
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/* Custom get/set_user functions, fallback to generic if NULL */
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int (*get_user)(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
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const struct kvm_one_reg *reg, void __user *uaddr);
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int (*set_user)(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd,
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const struct kvm_one_reg *reg, void __user *uaddr);
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};
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static inline void print_sys_reg_instr(const struct sys_reg_params *p)
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{
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/* Look, we even formatted it for you to paste into the table! */
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kvm_pr_unimpl(" { Op0(%2u), Op1(%2u), CRn(%2u), CRm(%2u), Op2(%2u), func_%s },\n",
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p->Op0, p->Op1, p->CRn, p->CRm, p->Op2, p->is_write ? "write" : "read");
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}
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static inline bool ignore_write(struct kvm_vcpu *vcpu,
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const struct sys_reg_params *p)
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{
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return true;
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}
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static inline bool read_zero(struct kvm_vcpu *vcpu,
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struct sys_reg_params *p)
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{
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p->regval = 0;
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return true;
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}
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static inline bool write_to_read_only(struct kvm_vcpu *vcpu,
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const struct sys_reg_params *params)
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{
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kvm_debug("sys_reg write to read-only register at: %lx\n",
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*vcpu_pc(vcpu));
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print_sys_reg_instr(params);
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return false;
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}
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static inline bool read_from_write_only(struct kvm_vcpu *vcpu,
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const struct sys_reg_params *params)
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{
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kvm_debug("sys_reg read to write-only register at: %lx\n",
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*vcpu_pc(vcpu));
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print_sys_reg_instr(params);
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return false;
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}
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/* Reset functions */
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static inline void reset_unknown(struct kvm_vcpu *vcpu,
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const struct sys_reg_desc *r)
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{
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BUG_ON(!r->reg);
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BUG_ON(r->reg >= NR_SYS_REGS);
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vcpu_sys_reg(vcpu, r->reg) = 0x1de7ec7edbadc0deULL;
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}
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static inline void reset_val(struct kvm_vcpu *vcpu, const struct sys_reg_desc *r)
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{
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BUG_ON(!r->reg);
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BUG_ON(r->reg >= NR_SYS_REGS);
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vcpu_sys_reg(vcpu, r->reg) = r->val;
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}
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static inline int cmp_sys_reg(const struct sys_reg_desc *i1,
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const struct sys_reg_desc *i2)
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{
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BUG_ON(i1 == i2);
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if (!i1)
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return 1;
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else if (!i2)
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return -1;
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if (i1->Op0 != i2->Op0)
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return i1->Op0 - i2->Op0;
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if (i1->Op1 != i2->Op1)
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return i1->Op1 - i2->Op1;
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if (i1->CRn != i2->CRn)
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return i1->CRn - i2->CRn;
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if (i1->CRm != i2->CRm)
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return i1->CRm - i2->CRm;
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return i1->Op2 - i2->Op2;
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}
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#define Op0(_x) .Op0 = _x
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#define Op1(_x) .Op1 = _x
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#define CRn(_x) .CRn = _x
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#define CRm(_x) .CRm = _x
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#define Op2(_x) .Op2 = _x
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#endif /* __ARM64_KVM_SYS_REGS_LOCAL_H__ */
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