4e6d488af3
Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
39 lines
1.2 KiB
ArmAsm
39 lines
1.2 KiB
ArmAsm
/* arch/arm/mach-lh7a40x/include/mach/debug-macro.S
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*
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* Debugging macro include header
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*
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* Copyright (C) 1994-1999 Russell King
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* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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@ It is not known if this will be appropriate for every 40x
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@ board.
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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mov \rx, #0x00000700 @ offset from base
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orreq \rx, \rx, #0x80000000 @ physical base
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orrne \rx, \rx, #0xf8000000 @ virtual base
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.endm
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.macro senduart,rd,rx
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strb \rd, [\rx] @ DATA
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.endm
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.macro busyuart,rd,rx @ spin while busy
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1001: ldr \rd, [\rx, #0x10] @ STATUS
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tst \rd, #1 << 3 @ BUSY (TX FIFO not empty)
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bne 1001b @ yes, spin
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.endm
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.macro waituart,rd,rx @ wait for Tx FIFO room
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1001: ldrb \rd, [\rx, #0x10] @ STATUS
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tst \rd, #1 << 5 @ TXFF (TX FIFO full)
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bne 1001b @ yes, spin
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.endm
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