2dc7667b9d
Patch from Nicolas Pitre According to the Intel PXA27x Processor Family Specification Update document (doc.nr. 280071-009) erratum E7, some care must be taken to locate the disabling and re-enabling of the MMU to the beginning of a cache line to avoid problems in some circumstances. Credits to Simon Vogl <simon.vogl@researchstudios.at> for bringing this up. Signed-off-by: Nicolas Pitre <nico@cam.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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| .. | ||
| big-endian.S | ||
| head-at91rm9200.S | ||
| head-clps7500.S | ||
| head-l7200.S | ||
| head-sa1100.S | ||
| head-shark.S | ||
| head-sharpsl.S | ||
| head-xscale.S | ||
| head.S | ||
| ll_char_wr.S | ||
| Makefile | ||
| Makefile.debug | ||
| misc.c | ||
| ofw-shark.c | ||
| piggy.S | ||
| vmlinux.lds.in | ||