717258ba4b
Add support for multiple hardware receive queues. The ingress traffic is hashed into one of the receive queues based on IP or TCP or both headers. The max no. of receive queues supported is 8. Signed-off-by: Vasanthy Kolluri <vkolluri@cisco.com> Signed-off-by: Roopa Prabhu <roprabhu@cisco.com> Signed-off-by: David Wang <dwang2@cisco.com> Signed-off-by: David S. Miller <davem@davemloft.net>
147 lines
4.7 KiB
C
147 lines
4.7 KiB
C
/*
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* Copyright 2008-2010 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* This program is free software; you may redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 of the License.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*
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*/
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#ifndef _ENIC_RES_H_
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#define _ENIC_RES_H_
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#include "wq_enet_desc.h"
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#include "rq_enet_desc.h"
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#include "vnic_wq.h"
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#include "vnic_rq.h"
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#define ENIC_MIN_WQ_DESCS 64
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#define ENIC_MAX_WQ_DESCS 4096
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#define ENIC_MIN_RQ_DESCS 64
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#define ENIC_MAX_RQ_DESCS 4096
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#define ENIC_MIN_MTU 576 /* minimum for IPv4 */
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#define ENIC_MAX_MTU 9000
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#define ENIC_MULTICAST_PERFECT_FILTERS 32
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#define ENIC_NON_TSO_MAX_DESC 16
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#define ENIC_SETTING(enic, f) ((enic->config.flags & VENETF_##f) ? 1 : 0)
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static inline void enic_queue_wq_desc_ex(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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unsigned int mss_or_csum_offset, unsigned int hdr_len,
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int vlan_tag_insert, unsigned int vlan_tag,
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int offload_mode, int cq_entry, int sop, int eop, int loopback)
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{
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struct wq_enet_desc *desc = vnic_wq_next_desc(wq);
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wq_enet_desc_enc(desc,
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(u64)dma_addr | VNIC_PADDR_TARGET,
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(u16)len,
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(u16)mss_or_csum_offset,
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(u16)hdr_len, (u8)offload_mode,
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(u8)eop, (u8)cq_entry,
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0, /* fcoe_encap */
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(u8)vlan_tag_insert,
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(u16)vlan_tag,
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(u8)loopback);
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vnic_wq_post(wq, os_buf, dma_addr, len, sop, eop);
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}
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static inline void enic_queue_wq_desc_cont(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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0, 0, 0, 0, 0,
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eop, 0 /* !SOP */, eop, loopback);
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}
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static inline void enic_queue_wq_desc(struct vnic_wq *wq, void *os_buf,
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dma_addr_t dma_addr, unsigned int len, int vlan_tag_insert,
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unsigned int vlan_tag, int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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0, 0, vlan_tag_insert, vlan_tag,
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WQ_ENET_OFFLOAD_MODE_CSUM,
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eop, 1 /* SOP */, eop, loopback);
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}
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static inline void enic_queue_wq_desc_csum(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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int ip_csum, int tcpudp_csum, int vlan_tag_insert,
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unsigned int vlan_tag, int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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(ip_csum ? 1 : 0) + (tcpudp_csum ? 2 : 0),
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0, vlan_tag_insert, vlan_tag,
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WQ_ENET_OFFLOAD_MODE_CSUM,
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eop, 1 /* SOP */, eop, loopback);
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}
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static inline void enic_queue_wq_desc_csum_l4(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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unsigned int csum_offset, unsigned int hdr_len,
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int vlan_tag_insert, unsigned int vlan_tag, int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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csum_offset, hdr_len, vlan_tag_insert, vlan_tag,
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WQ_ENET_OFFLOAD_MODE_CSUM_L4,
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eop, 1 /* SOP */, eop, loopback);
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}
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static inline void enic_queue_wq_desc_tso(struct vnic_wq *wq,
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void *os_buf, dma_addr_t dma_addr, unsigned int len,
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unsigned int mss, unsigned int hdr_len, int vlan_tag_insert,
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unsigned int vlan_tag, int eop, int loopback)
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{
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enic_queue_wq_desc_ex(wq, os_buf, dma_addr, len,
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mss, hdr_len, vlan_tag_insert, vlan_tag,
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WQ_ENET_OFFLOAD_MODE_TSO,
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eop, 1 /* SOP */, eop, loopback);
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}
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static inline void enic_queue_rq_desc(struct vnic_rq *rq,
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void *os_buf, unsigned int os_buf_index,
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dma_addr_t dma_addr, unsigned int len)
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{
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struct rq_enet_desc *desc = vnic_rq_next_desc(rq);
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u8 type = os_buf_index ?
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RQ_ENET_TYPE_NOT_SOP : RQ_ENET_TYPE_ONLY_SOP;
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rq_enet_desc_enc(desc,
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(u64)dma_addr | VNIC_PADDR_TARGET,
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type, (u16)len);
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vnic_rq_post(rq, os_buf, os_buf_index, dma_addr, len);
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}
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struct enic;
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int enic_get_vnic_config(struct enic *);
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int enic_add_vlan(struct enic *enic, u16 vlanid);
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int enic_del_vlan(struct enic *enic, u16 vlanid);
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int enic_set_nic_cfg(struct enic *enic, u8 rss_default_cpu, u8 rss_hash_type,
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u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable, u8 tso_ipid_split_en,
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u8 ig_vlan_strip_en);
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int enic_set_rss_key(struct enic *enic, dma_addr_t key_pa, u64 len);
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int enic_set_rss_cpu(struct enic *enic, dma_addr_t cpu_pa, u64 len);
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void enic_get_res_counts(struct enic *enic);
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void enic_init_vnic_resources(struct enic *enic);
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int enic_alloc_vnic_resources(struct enic *);
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void enic_free_vnic_resources(struct enic *);
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#endif /* _ENIC_RES_H_ */
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