ab33d5071d
There has been a CPIA2 driver out of kernel for a long time and it has been pretty clean for some time too. This is an import of the sourceforge driver which has been stripped of - 2.4 back compatibility - 2.4 old style MJPEG ioctls A couple of functions have been made static and the docs have been repackaged into Documentation/video4linux. The rvmalloc/free functions now match the cpia driver again. Other than that this is the code as is. Tested on x86-64 with a QX5 microscope. Signed-off-by: Alan Cox <alan@redhat.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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2.3 KiB
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38 lines
No EOL
2.3 KiB
Text
Programmer's View of Cpia2
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Cpia2 is the second generation video coprocessor from VLSI Vision Ltd (now a
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division of ST Microelectronics). There are two versions. The first is the
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STV0672, which is capable of up to 30 frames per second (fps) in frame sizes
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up to CIF, and 15 fps for VGA frames. The STV0676 is an improved version,
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which can handle up to 30 fps VGA. Both coprocessors can be attached to two
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CMOS sensors - the vvl6410 CIF sensor and the vvl6500 VGA sensor. These will
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be referred to as the 410 and the 500 sensors, or the CIF and VGA sensors.
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The two chipsets operate almost identically. The core is an 8051 processor,
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running two different versions of firmware. The 672 runs the VP4 video
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processor code, the 676 runs VP5. There are a few differences in register
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mappings for the two chips. In these cases, the symbols defined in the
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header files are marked with VP4 or VP5 as part of the symbol name.
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The cameras appear externally as three sets of registers. Setting register
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values is the only way to control the camera. Some settings are
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interdependant, such as the sequence required to power up the camera. I will
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try to make note of all of these cases.
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The register sets are called blocks. Block 0 is the system block. This
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section is always powered on when the camera is plugged in. It contains
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registers that control housekeeping functions such as powering up the video
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processor. The video processor is the VP block. These registers control
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how the video from the sensor is processed. Examples are timing registers,
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user mode (vga, qvga), scaling, cropping, framerates, and so on. The last
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block is the video compressor (VC). The video stream sent from the camera is
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compressed as Motion JPEG (JPEGA). The VC controls all of the compression
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parameters. Looking at the file cpia2_registers.h, you can get a full view
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of these registers and the possible values for most of them.
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One or more registers can be set or read by sending a usb control message to
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the camera. There are three modes for this. Block mode requests a number
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of contiguous registers. Random mode reads or writes random registers with
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a tuple structure containing address/value pairs. The repeat mode is only
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used by VP4 to load a firmware patch. It contains a starting address and
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a sequence of bytes to be written into a gpio port. |