b8edf848e9
Here are more patches in the progression towards multiplatform, sparse irq conversions in particular. Tegra has a handful of cleanups and general groundwork, but is not quite there yet on full enablement. Platforms that are enabled through this branch are VT8500 and Zynq. note that i.MX was converted in one of the earlier cleanup branches as well (before we started a separate topic for multiplatform). And both new platforms for this merge window, sunxi and bcm, were merged with multiplatform support enabled. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJQySb/AAoJEIwa5zzehBx3Wo4P/0GrpUhB/qwuhgy43MA2I1Dv tnyuFvsfW9uRExcw2IwT39GFls98QUM9TwQxPqOTHVf+u0LkYMZ9aDeWJOdj3RvG H70Ypj4gZDrzZAFr2TUf8NnYGHd6G2EcMn3261Hjfd7YrswCjsMPvgRns7VOyHCa deif3KcLu3+HzxvuzqlVlTuSAagCQbfqqnTQduMRdJPHT3X3sXwl7ABW+qfOoeYC rjqIbjdh5dB1d/f7igtgBbXjSTnVz/Mr1+wk4rp9Xr1Wv0IXvIaSKjK2Df8ZuNAk aQ6mMy/oDVxlDSrYv0F7lB40/rsZcPqz8+fgYJ2FnvCpIM7z7NeTWD2kQJ2UaQ/s VunShloRxF8It6104EVWZDfEA9NvVBcCALSze0NukqiHZRZYGUzxRNQDrncaksC9 Lm+Z16cUWogsZq7VDCgXYQJeakPQfBDnsx7siMvAbOgvtpSClxuwhdC/czJiix7h BcpA+l5xSviUhHvzHhDt9iJxHjbUmo1xLDvaZSgj2OjAj257JcwaNBCk5BjZTCwe xZmQu1FjwaGtjLiG6QY0WJRsq1hiFRIb/MaWar/WpfqADFqARoambGFUjOl+P4Mu DIM5Z0AS04H+pLuP1QOz/yXxOPEP6Ri36to6XrgzfL/XGet5LW2P59xXxhcWC/OL /3IAcQrsAqh4aGMOstW1 =UJlh -----END PGP SIGNATURE----- Merge tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc Pull ARM SoC multiplatform conversion patches from Olof Johansson: "Here are more patches in the progression towards multiplatform, sparse irq conversions in particular. Tegra has a handful of cleanups and general groundwork, but is not quite there yet on full enablement. Platforms that are enabled through this branch are VT8500 and Zynq. Note that i.MX was converted in one of the earlier cleanup branches as well (before we started a separate topic for multiplatform). And both new platforms for this merge window, sunxi and bcm, were merged with multiplatform support enabled." Fix up conflicts mostly as per Olof. * tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits) ARM: zynq: Remove all unused mach headers ARM: zynq: add support for ARCH_MULTIPLATFORM ARM: zynq: make use of debug_ll_io_init() ARM: zynq: remove TTC early mapping ARM: tegra: move debug-macro.S to include/debug ARM: tegra: don't include iomap.h from debug-macro.S ARM: tegra: decouple uncompress.h and debug-macro.S ARM: tegra: simplify DEBUG_LL UART selection options ARM: tegra: select SPARSE_IRQ ARM: tegra: enhance timer.c to get IO address from device tree ARM: tegra: enhance timer.c to get IRQ info from device tree ARM: timer: fix checkpatch warnings ARM: tegra: add TWD to device tree ARM: tegra: define DT bindings for and instantiate RTC ARM: tegra: define DT bindings for and instantiate timer clocksource/mtu-nomadik: use apb_pclk clk: ux500: Register mtu apb_pclocks ARM: plat-nomadik: convert platforms to SPARSE_IRQ mfd/db8500-prcmu: use the irq_domain_add_simple() mfd/ab8500-core: use irq_domain_add_simple() ...
197 lines
4.8 KiB
C
197 lines
4.8 KiB
C
/*
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* arch/arm/mach-vt8500/vt8500.c
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*
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* Copyright (C) 2012 Tony Prisk <linux@prisktech.co.nz>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/io.h>
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#include <linux/pm.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/mach/map.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/of_irq.h>
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#include <linux/of_platform.h>
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#include "common.h"
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#define LEGACY_GPIO_BASE 0xD8110000
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#define LEGACY_PMC_BASE 0xD8130000
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/* Registers in GPIO Controller */
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#define VT8500_GPIO_MUX_REG 0x200
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/* Registers in Power Management Controller */
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#define VT8500_HCR_REG 0x12
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#define VT8500_PMSR_REG 0x60
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static void __iomem *pmc_base;
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void vt8500_restart(char mode, const char *cmd)
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{
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if (pmc_base)
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writel(1, pmc_base + VT8500_PMSR_REG);
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}
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static struct map_desc vt8500_io_desc[] __initdata = {
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/* SoC MMIO registers */
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[0] = {
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.virtual = 0xf8000000,
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.pfn = __phys_to_pfn(0xd8000000),
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.length = 0x00390000, /* max of all chip variants */
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.type = MT_DEVICE
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},
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};
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void __init vt8500_map_io(void)
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{
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iotable_init(vt8500_io_desc, ARRAY_SIZE(vt8500_io_desc));
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}
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static void vt8500_power_off(void)
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{
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local_irq_disable();
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writew(5, pmc_base + VT8500_HCR_REG);
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asm("mcr%? p15, 0, %0, c7, c0, 4" : : "r" (0));
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}
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void __init vt8500_init(void)
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{
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struct device_node *np;
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#if defined(CONFIG_FB_VT8500) || defined(CONFIG_FB_WM8505)
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struct device_node *fb;
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void __iomem *gpio_base;
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#endif
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#ifdef CONFIG_FB_VT8500
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fb = of_find_compatible_node(NULL, NULL, "via,vt8500-fb");
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if (fb) {
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np = of_find_compatible_node(NULL, NULL, "via,vt8500-gpio");
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if (np) {
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gpio_base = of_iomap(np, 0);
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if (!gpio_base)
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pr_err("%s: of_iomap(gpio_mux) failed\n",
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__func__);
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of_node_put(np);
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} else {
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gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
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if (!gpio_base)
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pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
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__func__);
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}
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if (gpio_base) {
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writel(readl(gpio_base + VT8500_GPIO_MUX_REG) | 1,
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gpio_base + VT8500_GPIO_MUX_REG);
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iounmap(gpio_base);
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} else
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pr_err("%s: Could not remap GPIO mux\n", __func__);
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of_node_put(fb);
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}
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#endif
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#ifdef CONFIG_FB_WM8505
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fb = of_find_compatible_node(NULL, NULL, "wm,wm8505-fb");
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if (fb) {
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np = of_find_compatible_node(NULL, NULL, "wm,wm8505-gpio");
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if (!np)
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np = of_find_compatible_node(NULL, NULL,
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"wm,wm8650-gpio");
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if (np) {
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gpio_base = of_iomap(np, 0);
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if (!gpio_base)
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pr_err("%s: of_iomap(gpio_mux) failed\n",
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__func__);
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of_node_put(np);
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} else {
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gpio_base = ioremap(LEGACY_GPIO_BASE, 0x1000);
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if (!gpio_base)
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pr_err("%s: ioremap(legacy_gpio_mux) failed\n",
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__func__);
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}
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if (gpio_base) {
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writel(readl(gpio_base + VT8500_GPIO_MUX_REG) |
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0x80000000, gpio_base + VT8500_GPIO_MUX_REG);
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iounmap(gpio_base);
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} else
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pr_err("%s: Could not remap GPIO mux\n", __func__);
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of_node_put(fb);
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}
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#endif
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np = of_find_compatible_node(NULL, NULL, "via,vt8500-pmc");
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if (np) {
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pmc_base = of_iomap(np, 0);
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if (!pmc_base)
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pr_err("%s:of_iomap(pmc) failed\n", __func__);
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of_node_put(np);
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} else {
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pmc_base = ioremap(LEGACY_PMC_BASE, 0x1000);
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if (!pmc_base)
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pr_err("%s:ioremap(power_off) failed\n", __func__);
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}
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if (pmc_base)
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pm_power_off = &vt8500_power_off;
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else
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pr_err("%s: PMC Hibernation register could not be remapped, not enabling power off!\n", __func__);
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vtwm_clk_init(pmc_base);
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of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
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}
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static const struct of_device_id vt8500_irq_match[] __initconst = {
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{ .compatible = "via,vt8500-intc", .data = vt8500_irq_init, },
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{ /* sentinel */ },
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};
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static void __init vt8500_init_irq(void)
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{
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of_irq_init(vt8500_irq_match);
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};
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static struct sys_timer vt8500_timer = {
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.init = vt8500_timer_init,
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};
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static const char * const vt8500_dt_compat[] = {
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"via,vt8500",
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"wm,wm8650",
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"wm,wm8505",
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};
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DT_MACHINE_START(WMT_DT, "VIA/Wondermedia SoC (Device Tree Support)")
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.dt_compat = vt8500_dt_compat,
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.map_io = vt8500_map_io,
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.init_irq = vt8500_init_irq,
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.timer = &vt8500_timer,
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.init_machine = vt8500_init,
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.restart = vt8500_restart,
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.handle_irq = vt8500_handle_irq,
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MACHINE_END
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