76c567fbba
The Tilera architecture traditionally supports 64KB page sizes to improve TLB utilization and improve performance when the hardware is being used primarily to run a single application. For more generic server scenarios, it can be beneficial to run with 4KB page sizes, so this commit allows that to be specified (by modifying the arch/tile/include/hv/pagesize.h header). As part of this change, we also re-worked the PTE management slightly so that PTE writes all go through a __set_pte() function where we can do some additional validation. The set_pte_order() function was eliminated since the "order" argument wasn't being used. One bug uncovered was in the PCI DMA code, which wasn't properly flushing the specified range. This was benign with 64KB pages, but with 4KB pages we were getting some larger flushes wrong. The per-cpu memory reservation code also needed updating to conform with the newer percpu stuff; before it always chose 64KB, and that was always correct, but with 4KB granularity we now have to pay closer attention and reserve the amount of memory that will be requested when the percpu code starts allocating. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
75 lines
2.8 KiB
C
75 lines
2.8 KiB
C
/*
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* Copyright 2010 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*/
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#ifndef _ASM_TILE_STACK_H
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#define _ASM_TILE_STACK_H
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#include <linux/types.h>
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#include <linux/sched.h>
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#include <asm/backtrace.h>
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#include <asm/page.h>
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#include <hv/hypervisor.h>
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/* Everything we need to keep track of a backtrace iteration */
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struct KBacktraceIterator {
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BacktraceIterator it;
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struct task_struct *task; /* task we are backtracing */
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pte_t *pgtable; /* page table for user space access */
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int end; /* iteration complete. */
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int new_context; /* new context is starting */
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int profile; /* profiling, so stop on async intrpt */
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int verbose; /* printk extra info (don't want to
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* do this for profiling) */
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int is_current; /* backtracing current task */
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};
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/* Iteration methods for kernel backtraces */
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/*
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* Initialize a KBacktraceIterator from a task_struct, and optionally from
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* a set of registers. If the registers are omitted, the process is
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* assumed to be descheduled, and registers are read from the process's
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* thread_struct and stack. "verbose" means to printk some additional
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* information about fault handlers as we pass them on the stack.
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*/
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extern void KBacktraceIterator_init(struct KBacktraceIterator *kbt,
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struct task_struct *, struct pt_regs *);
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/* Initialize iterator based on current stack. */
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extern void KBacktraceIterator_init_current(struct KBacktraceIterator *kbt);
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/* Helper method for above. */
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extern void _KBacktraceIterator_init_current(struct KBacktraceIterator *kbt,
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ulong pc, ulong lr, ulong sp, ulong r52);
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/* No more frames? */
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extern int KBacktraceIterator_end(struct KBacktraceIterator *kbt);
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/* Advance to the next frame. */
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extern void KBacktraceIterator_next(struct KBacktraceIterator *kbt);
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/*
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* Dump stack given complete register info. Use only from the
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* architecture-specific code; show_stack()
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* and dump_stack() (in entry.S) are architecture-independent entry points.
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*/
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extern void tile_show_stack(struct KBacktraceIterator *, int headers);
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/* Dump stack of current process, with registers to seed the backtrace. */
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extern void dump_stack_regs(struct pt_regs *);
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/* Helper method for assembly dump_stack(). */
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extern void _dump_stack(int dummy, ulong pc, ulong lr, ulong sp, ulong r52);
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#endif /* _ASM_TILE_STACK_H */
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