9e1b32caa5
mm: Pass virtual address to [__]p{te,ud,md}_free_tlb()
Upcoming paches to support the new 64-bit "BookE" powerpc architecture
will need to have the virtual address corresponding to PTE page when
freeing it, due to the way the HW table walker works.
Basically, the TLB can be loaded with "large" pages that cover the whole
virtual space (well, sort-of, half of it actually) represented by a PTE
page, and which contain an "indirect" bit indicating that this TLB entry
RPN points to an array of PTEs from which the TLB can then create direct
entries. Thus, in order to invalidate those when PTE pages are deleted,
we need the virtual address to pass to tlbilx or tlbivax instructions.
The old trick of sticking it somewhere in the PTE page struct page sucks
too much, the address is almost readily available in all call sites and
almost everybody implemets these as macros, so we may as well add the
argument everywhere. I added it to the pmd and pud variants for consistency.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Acked-by: David Howells <dhowells@redhat.com> [MN10300 & FRV]
Acked-by: Nick Piggin <npiggin@suse.de>
Acked-by: Martin Schwidefsky <schwidefsky@de.ibm.com> [s390]
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
47 lines
1.1 KiB
C
47 lines
1.1 KiB
C
/*
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* include/asm-xtensa/tlb.h
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2001 - 2005 Tensilica Inc.
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*/
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#ifndef _XTENSA_TLB_H
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#define _XTENSA_TLB_H
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#include <asm/cache.h>
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#include <asm/page.h>
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#if (DCACHE_WAY_SIZE <= PAGE_SIZE)
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/* Note, read http://lkml.org/lkml/2004/1/15/6 */
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# define tlb_start_vma(tlb,vma) do { } while (0)
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# define tlb_end_vma(tlb,vma) do { } while (0)
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#else
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# define tlb_start_vma(tlb, vma) \
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do { \
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if (!tlb->fullmm) \
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flush_cache_range(vma, vma->vm_start, vma->vm_end); \
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} while(0)
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# define tlb_end_vma(tlb, vma) \
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do { \
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if (!tlb->fullmm) \
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flush_tlb_range(vma, vma->vm_start, vma->vm_end); \
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} while(0)
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#endif
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#define __tlb_remove_tlb_entry(tlb,pte,addr) do { } while (0)
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#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
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#include <asm-generic/tlb.h>
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#define __pte_free_tlb(tlb, pte, address) pte_free((tlb)->mm, pte)
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#endif /* _XTENSA_TLB_H */
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