757885e94a
Add early microcode patch loading support for AMD. Signed-off-by: Jacob Shin <jacob.shin@amd.com> Link: http://lkml.kernel.org/r/1369940959-2077-5-git-send-email-jacob.shin@amd.com Signed-off-by: H. Peter Anvin <hpa@linux.intel.com> Cc: Fenghua Yu <fenghua.yu@intel.com>
141 lines
3 KiB
C
141 lines
3 KiB
C
/*
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* X86 CPU microcode early update for Linux
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*
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* Copyright (C) 2012 Fenghua Yu <fenghua.yu@intel.com>
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* H Peter Anvin" <hpa@zytor.com>
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*
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* This driver allows to early upgrade microcode on Intel processors
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* belonging to IA-32 family - PentiumPro, Pentium II,
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* Pentium III, Xeon, Pentium 4, etc.
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*
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* Reference: Section 9.11 of Volume 3, IA-32 Intel Architecture
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* Software Developer's Manual.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/module.h>
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#include <asm/microcode_intel.h>
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#include <asm/microcode_amd.h>
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#include <asm/processor.h>
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#define QCHAR(a, b, c, d) ((a) + ((b) << 8) + ((c) << 16) + ((d) << 24))
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#define CPUID_INTEL1 QCHAR('G', 'e', 'n', 'u')
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#define CPUID_INTEL2 QCHAR('i', 'n', 'e', 'I')
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#define CPUID_INTEL3 QCHAR('n', 't', 'e', 'l')
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#define CPUID_AMD1 QCHAR('A', 'u', 't', 'h')
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#define CPUID_AMD2 QCHAR('e', 'n', 't', 'i')
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#define CPUID_AMD3 QCHAR('c', 'A', 'M', 'D')
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#define CPUID_IS(a, b, c, ebx, ecx, edx) \
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(!((ebx ^ (a))|(edx ^ (b))|(ecx ^ (c))))
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/*
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* In early loading microcode phase on BSP, boot_cpu_data is not set up yet.
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* x86_vendor() gets vendor id for BSP.
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*
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* In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify
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* coding, we still use x86_vendor() to get vendor id for AP.
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*
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* x86_vendor() gets vendor information directly through cpuid.
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*/
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static int __cpuinit x86_vendor(void)
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{
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u32 eax = 0x00000000;
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u32 ebx, ecx = 0, edx;
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native_cpuid(&eax, &ebx, &ecx, &edx);
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if (CPUID_IS(CPUID_INTEL1, CPUID_INTEL2, CPUID_INTEL3, ebx, ecx, edx))
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return X86_VENDOR_INTEL;
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if (CPUID_IS(CPUID_AMD1, CPUID_AMD2, CPUID_AMD3, ebx, ecx, edx))
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return X86_VENDOR_AMD;
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return X86_VENDOR_UNKNOWN;
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}
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static int __cpuinit x86_family(void)
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{
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u32 eax = 0x00000001;
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u32 ebx, ecx = 0, edx;
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int x86;
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native_cpuid(&eax, &ebx, &ecx, &edx);
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x86 = (eax >> 8) & 0xf;
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if (x86 == 15)
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x86 += (eax >> 20) & 0xff;
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return x86;
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}
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void __init load_ucode_bsp(void)
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{
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int vendor, x86;
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if (!have_cpuid_p())
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return;
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vendor = x86_vendor();
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x86 = x86_family();
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switch (vendor) {
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case X86_VENDOR_INTEL:
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if (x86 >= 6)
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load_ucode_intel_bsp();
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break;
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case X86_VENDOR_AMD:
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if (x86 >= 0x10)
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load_ucode_amd_bsp();
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break;
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default:
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break;
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}
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}
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void __cpuinit load_ucode_ap(void)
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{
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int vendor, x86;
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if (!have_cpuid_p())
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return;
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vendor = x86_vendor();
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x86 = x86_family();
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switch (vendor) {
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case X86_VENDOR_INTEL:
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if (x86 >= 6)
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load_ucode_intel_ap();
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break;
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case X86_VENDOR_AMD:
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if (x86 >= 0x10)
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load_ucode_amd_ap();
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break;
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default:
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break;
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}
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}
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int __init save_microcode_in_initrd(void)
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{
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struct cpuinfo_x86 *c = &boot_cpu_data;
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switch (c->x86_vendor) {
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case X86_VENDOR_INTEL:
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if (c->x86 >= 6)
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save_microcode_in_initrd_intel();
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break;
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case X86_VENDOR_AMD:
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if (c->x86 >= 0x10)
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save_microcode_in_initrd_amd();
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break;
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default:
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break;
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}
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return 0;
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}
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