5a0e3ad6af
percpu.h is included by sched.h and module.h and thus ends up being included when building most .c files. percpu.h includes slab.h which in turn includes gfp.h making everything defined by the two files universally available and complicating inclusion dependencies. percpu.h -> slab.h dependency is about to be removed. Prepare for this change by updating users of gfp and slab facilities include those headers directly instead of assuming availability. As this conversion needs to touch large number of source files, the following script is used as the basis of conversion. http://userweb.kernel.org/~tj/misc/slabh-sweep.py The script does the followings. * Scan files for gfp and slab usages and update includes such that only the necessary includes are there. ie. if only gfp is used, gfp.h, if slab is used, slab.h. * When the script inserts a new include, it looks at the include blocks and try to put the new include such that its order conforms to its surrounding. It's put in the include block which contains core kernel includes, in the same order that the rest are ordered - alphabetical, Christmas tree, rev-Xmas-tree or at the end if there doesn't seem to be any matching order. * If the script can't find a place to put a new include (mostly because the file doesn't have fitting include block), it prints out an error message indicating which .h file needs to be added to the file. The conversion was done in the following steps. 1. The initial automatic conversion of all .c files updated slightly over 4000 files, deleting around 700 includes and adding ~480 gfp.h and ~3000 slab.h inclusions. The script emitted errors for ~400 files. 2. Each error was manually checked. Some didn't need the inclusion, some needed manual addition while adding it to implementation .h or embedding .c file was more appropriate for others. This step added inclusions to around 150 files. 3. The script was run again and the output was compared to the edits from #2 to make sure no file was left behind. 4. Several build tests were done and a couple of problems were fixed. e.g. lib/decompress_*.c used malloc/free() wrappers around slab APIs requiring slab.h to be added manually. 5. The script was run on all .h files but without automatically editing them as sprinkling gfp.h and slab.h inclusions around .h files could easily lead to inclusion dependency hell. Most gfp.h inclusion directives were ignored as stuff from gfp.h was usually wildly available and often used in preprocessor macros. Each slab.h inclusion directive was examined and added manually as necessary. 6. percpu.h was updated not to include slab.h. 7. Build test were done on the following configurations and failures were fixed. CONFIG_GCOV_KERNEL was turned off for all tests (as my distributed build env didn't work with gcov compiles) and a few more options had to be turned off depending on archs to make things build (like ipr on powerpc/64 which failed due to missing writeq). * x86 and x86_64 UP and SMP allmodconfig and a custom test config. * powerpc and powerpc64 SMP allmodconfig * sparc and sparc64 SMP allmodconfig * ia64 SMP allmodconfig * s390 SMP allmodconfig * alpha SMP allmodconfig * um on x86_64 SMP allmodconfig 8. percpu.h modifications were reverted so that it could be applied as a separate patch and serve as bisection point. Given the fact that I had only a couple of failures from tests on step 6, I'm fairly confident about the coverage of this conversion patch. If there is a breakage, it's likely to be something in one of the arch headers which should be easily discoverable easily on most builds of the specific arch. Signed-off-by: Tejun Heo <tj@kernel.org> Guess-its-ok-by: Christoph Lameter <cl@linux-foundation.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Lee Schermerhorn <Lee.Schermerhorn@hp.com>
770 lines
20 KiB
C
770 lines
20 KiB
C
/*
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* Copyright 2009 Jerome Glisse.
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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*/
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/*
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* Authors:
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* Jerome Glisse <glisse@freedesktop.org>
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* Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
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* Dave Airlie
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*/
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#include <ttm/ttm_bo_api.h>
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#include <ttm/ttm_bo_driver.h>
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#include <ttm/ttm_placement.h>
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#include <ttm/ttm_module.h>
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#include <drm/drmP.h>
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#include <drm/radeon_drm.h>
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#include <linux/seq_file.h>
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#include <linux/slab.h>
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#include "radeon_reg.h"
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#include "radeon.h"
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#define DRM_FILE_PAGE_OFFSET (0x100000000ULL >> PAGE_SHIFT)
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static int radeon_ttm_debugfs_init(struct radeon_device *rdev);
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static struct radeon_device *radeon_get_rdev(struct ttm_bo_device *bdev)
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{
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struct radeon_mman *mman;
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struct radeon_device *rdev;
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mman = container_of(bdev, struct radeon_mman, bdev);
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rdev = container_of(mman, struct radeon_device, mman);
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return rdev;
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}
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/*
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* Global memory.
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*/
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static int radeon_ttm_mem_global_init(struct ttm_global_reference *ref)
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{
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return ttm_mem_global_init(ref->object);
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}
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static void radeon_ttm_mem_global_release(struct ttm_global_reference *ref)
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{
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ttm_mem_global_release(ref->object);
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}
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static int radeon_ttm_global_init(struct radeon_device *rdev)
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{
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struct ttm_global_reference *global_ref;
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int r;
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rdev->mman.mem_global_referenced = false;
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global_ref = &rdev->mman.mem_global_ref;
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global_ref->global_type = TTM_GLOBAL_TTM_MEM;
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global_ref->size = sizeof(struct ttm_mem_global);
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global_ref->init = &radeon_ttm_mem_global_init;
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global_ref->release = &radeon_ttm_mem_global_release;
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r = ttm_global_item_ref(global_ref);
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if (r != 0) {
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DRM_ERROR("Failed setting up TTM memory accounting "
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"subsystem.\n");
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return r;
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}
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rdev->mman.bo_global_ref.mem_glob =
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rdev->mman.mem_global_ref.object;
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global_ref = &rdev->mman.bo_global_ref.ref;
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global_ref->global_type = TTM_GLOBAL_TTM_BO;
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global_ref->size = sizeof(struct ttm_bo_global);
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global_ref->init = &ttm_bo_global_init;
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global_ref->release = &ttm_bo_global_release;
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r = ttm_global_item_ref(global_ref);
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if (r != 0) {
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DRM_ERROR("Failed setting up TTM BO subsystem.\n");
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ttm_global_item_unref(&rdev->mman.mem_global_ref);
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return r;
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}
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rdev->mman.mem_global_referenced = true;
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return 0;
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}
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static void radeon_ttm_global_fini(struct radeon_device *rdev)
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{
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if (rdev->mman.mem_global_referenced) {
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ttm_global_item_unref(&rdev->mman.bo_global_ref.ref);
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ttm_global_item_unref(&rdev->mman.mem_global_ref);
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rdev->mman.mem_global_referenced = false;
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}
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}
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struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev);
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static struct ttm_backend*
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radeon_create_ttm_backend_entry(struct ttm_bo_device *bdev)
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{
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struct radeon_device *rdev;
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rdev = radeon_get_rdev(bdev);
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#if __OS_HAS_AGP
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if (rdev->flags & RADEON_IS_AGP) {
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return ttm_agp_backend_init(bdev, rdev->ddev->agp->bridge);
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} else
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#endif
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{
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return radeon_ttm_backend_create(rdev);
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}
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}
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static int radeon_invalidate_caches(struct ttm_bo_device *bdev, uint32_t flags)
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{
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return 0;
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}
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static int radeon_init_mem_type(struct ttm_bo_device *bdev, uint32_t type,
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struct ttm_mem_type_manager *man)
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{
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struct radeon_device *rdev;
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rdev = radeon_get_rdev(bdev);
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switch (type) {
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case TTM_PL_SYSTEM:
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/* System memory */
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man->flags = TTM_MEMTYPE_FLAG_MAPPABLE;
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man->available_caching = TTM_PL_MASK_CACHING;
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man->default_caching = TTM_PL_FLAG_CACHED;
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break;
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case TTM_PL_TT:
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man->gpu_offset = rdev->mc.gtt_start;
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man->available_caching = TTM_PL_MASK_CACHING;
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man->default_caching = TTM_PL_FLAG_CACHED;
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man->flags = TTM_MEMTYPE_FLAG_MAPPABLE | TTM_MEMTYPE_FLAG_CMA;
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#if __OS_HAS_AGP
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if (rdev->flags & RADEON_IS_AGP) {
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if (!(drm_core_has_AGP(rdev->ddev) && rdev->ddev->agp)) {
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DRM_ERROR("AGP is not enabled for memory type %u\n",
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(unsigned)type);
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return -EINVAL;
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}
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man->io_offset = rdev->mc.agp_base;
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man->io_size = rdev->mc.gtt_size;
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man->io_addr = NULL;
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if (!rdev->ddev->agp->cant_use_aperture)
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man->flags = TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
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TTM_MEMTYPE_FLAG_MAPPABLE;
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man->available_caching = TTM_PL_FLAG_UNCACHED |
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TTM_PL_FLAG_WC;
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man->default_caching = TTM_PL_FLAG_WC;
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} else
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#endif
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{
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man->io_offset = 0;
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man->io_size = 0;
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man->io_addr = NULL;
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}
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break;
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case TTM_PL_VRAM:
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/* "On-card" video ram */
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man->gpu_offset = rdev->mc.vram_start;
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man->flags = TTM_MEMTYPE_FLAG_FIXED |
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TTM_MEMTYPE_FLAG_NEEDS_IOREMAP |
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TTM_MEMTYPE_FLAG_MAPPABLE;
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man->available_caching = TTM_PL_FLAG_UNCACHED | TTM_PL_FLAG_WC;
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man->default_caching = TTM_PL_FLAG_WC;
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man->io_addr = NULL;
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man->io_offset = rdev->mc.aper_base;
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man->io_size = rdev->mc.aper_size;
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break;
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default:
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DRM_ERROR("Unsupported memory type %u\n", (unsigned)type);
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return -EINVAL;
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}
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return 0;
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}
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static void radeon_evict_flags(struct ttm_buffer_object *bo,
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struct ttm_placement *placement)
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{
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struct radeon_bo *rbo;
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static u32 placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
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if (!radeon_ttm_bo_is_radeon_bo(bo)) {
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placement->fpfn = 0;
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placement->lpfn = 0;
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placement->placement = &placements;
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placement->busy_placement = &placements;
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placement->num_placement = 1;
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placement->num_busy_placement = 1;
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return;
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}
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rbo = container_of(bo, struct radeon_bo, tbo);
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switch (bo->mem.mem_type) {
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case TTM_PL_VRAM:
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if (rbo->rdev->cp.ready == false)
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radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
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else
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radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_GTT);
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break;
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case TTM_PL_TT:
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default:
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radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_CPU);
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}
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*placement = rbo->placement;
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}
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static int radeon_verify_access(struct ttm_buffer_object *bo, struct file *filp)
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{
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return 0;
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}
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static void radeon_move_null(struct ttm_buffer_object *bo,
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struct ttm_mem_reg *new_mem)
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{
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struct ttm_mem_reg *old_mem = &bo->mem;
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BUG_ON(old_mem->mm_node != NULL);
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*old_mem = *new_mem;
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new_mem->mm_node = NULL;
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}
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static int radeon_move_blit(struct ttm_buffer_object *bo,
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bool evict, int no_wait,
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struct ttm_mem_reg *new_mem,
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struct ttm_mem_reg *old_mem)
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{
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struct radeon_device *rdev;
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uint64_t old_start, new_start;
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struct radeon_fence *fence;
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int r;
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rdev = radeon_get_rdev(bo->bdev);
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r = radeon_fence_create(rdev, &fence);
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if (unlikely(r)) {
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return r;
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}
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old_start = old_mem->mm_node->start << PAGE_SHIFT;
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new_start = new_mem->mm_node->start << PAGE_SHIFT;
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switch (old_mem->mem_type) {
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case TTM_PL_VRAM:
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old_start += rdev->mc.vram_start;
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break;
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case TTM_PL_TT:
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old_start += rdev->mc.gtt_start;
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break;
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default:
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DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
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return -EINVAL;
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}
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switch (new_mem->mem_type) {
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case TTM_PL_VRAM:
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new_start += rdev->mc.vram_start;
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break;
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case TTM_PL_TT:
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new_start += rdev->mc.gtt_start;
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break;
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default:
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DRM_ERROR("Unknown placement %d\n", old_mem->mem_type);
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return -EINVAL;
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}
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if (!rdev->cp.ready) {
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DRM_ERROR("Trying to move memory with CP turned off.\n");
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return -EINVAL;
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}
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r = radeon_copy(rdev, old_start, new_start, new_mem->num_pages, fence);
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/* FIXME: handle copy error */
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r = ttm_bo_move_accel_cleanup(bo, (void *)fence, NULL,
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evict, no_wait, new_mem);
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radeon_fence_unref(&fence);
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return r;
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}
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static int radeon_move_vram_ram(struct ttm_buffer_object *bo,
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bool evict, bool interruptible, bool no_wait,
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struct ttm_mem_reg *new_mem)
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{
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struct radeon_device *rdev;
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struct ttm_mem_reg *old_mem = &bo->mem;
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struct ttm_mem_reg tmp_mem;
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u32 placements;
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struct ttm_placement placement;
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int r;
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rdev = radeon_get_rdev(bo->bdev);
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tmp_mem = *new_mem;
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tmp_mem.mm_node = NULL;
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placement.fpfn = 0;
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placement.lpfn = 0;
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placement.num_placement = 1;
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placement.placement = &placements;
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placement.num_busy_placement = 1;
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placement.busy_placement = &placements;
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placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
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r = ttm_bo_mem_space(bo, &placement, &tmp_mem,
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interruptible, no_wait);
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if (unlikely(r)) {
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return r;
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}
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r = ttm_tt_set_placement_caching(bo->ttm, tmp_mem.placement);
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if (unlikely(r)) {
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goto out_cleanup;
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}
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r = ttm_tt_bind(bo->ttm, &tmp_mem);
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if (unlikely(r)) {
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goto out_cleanup;
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}
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r = radeon_move_blit(bo, true, no_wait, &tmp_mem, old_mem);
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if (unlikely(r)) {
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goto out_cleanup;
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}
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r = ttm_bo_move_ttm(bo, true, no_wait, new_mem);
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out_cleanup:
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if (tmp_mem.mm_node) {
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struct ttm_bo_global *glob = rdev->mman.bdev.glob;
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spin_lock(&glob->lru_lock);
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drm_mm_put_block(tmp_mem.mm_node);
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spin_unlock(&glob->lru_lock);
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return r;
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}
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return r;
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}
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static int radeon_move_ram_vram(struct ttm_buffer_object *bo,
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bool evict, bool interruptible, bool no_wait,
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struct ttm_mem_reg *new_mem)
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{
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struct radeon_device *rdev;
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struct ttm_mem_reg *old_mem = &bo->mem;
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struct ttm_mem_reg tmp_mem;
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struct ttm_placement placement;
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u32 placements;
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int r;
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rdev = radeon_get_rdev(bo->bdev);
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tmp_mem = *new_mem;
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tmp_mem.mm_node = NULL;
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placement.fpfn = 0;
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placement.lpfn = 0;
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placement.num_placement = 1;
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placement.placement = &placements;
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placement.num_busy_placement = 1;
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placement.busy_placement = &placements;
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placements = TTM_PL_MASK_CACHING | TTM_PL_FLAG_TT;
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r = ttm_bo_mem_space(bo, &placement, &tmp_mem, interruptible, no_wait);
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if (unlikely(r)) {
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return r;
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}
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r = ttm_bo_move_ttm(bo, true, no_wait, &tmp_mem);
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if (unlikely(r)) {
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goto out_cleanup;
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}
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r = radeon_move_blit(bo, true, no_wait, new_mem, old_mem);
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if (unlikely(r)) {
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goto out_cleanup;
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}
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out_cleanup:
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if (tmp_mem.mm_node) {
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struct ttm_bo_global *glob = rdev->mman.bdev.glob;
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spin_lock(&glob->lru_lock);
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drm_mm_put_block(tmp_mem.mm_node);
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spin_unlock(&glob->lru_lock);
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return r;
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}
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return r;
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}
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static int radeon_bo_move(struct ttm_buffer_object *bo,
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bool evict, bool interruptible, bool no_wait,
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struct ttm_mem_reg *new_mem)
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{
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struct radeon_device *rdev;
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struct ttm_mem_reg *old_mem = &bo->mem;
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int r;
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rdev = radeon_get_rdev(bo->bdev);
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if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) {
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radeon_move_null(bo, new_mem);
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return 0;
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}
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if ((old_mem->mem_type == TTM_PL_TT &&
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new_mem->mem_type == TTM_PL_SYSTEM) ||
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(old_mem->mem_type == TTM_PL_SYSTEM &&
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new_mem->mem_type == TTM_PL_TT)) {
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/* bind is enough */
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radeon_move_null(bo, new_mem);
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return 0;
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}
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if (!rdev->cp.ready || rdev->asic->copy == NULL) {
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/* use memcpy */
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|
goto memcpy;
|
|
}
|
|
|
|
if (old_mem->mem_type == TTM_PL_VRAM &&
|
|
new_mem->mem_type == TTM_PL_SYSTEM) {
|
|
r = radeon_move_vram_ram(bo, evict, interruptible,
|
|
no_wait, new_mem);
|
|
} else if (old_mem->mem_type == TTM_PL_SYSTEM &&
|
|
new_mem->mem_type == TTM_PL_VRAM) {
|
|
r = radeon_move_ram_vram(bo, evict, interruptible,
|
|
no_wait, new_mem);
|
|
} else {
|
|
r = radeon_move_blit(bo, evict, no_wait, new_mem, old_mem);
|
|
}
|
|
|
|
if (r) {
|
|
memcpy:
|
|
r = ttm_bo_move_memcpy(bo, evict, no_wait, new_mem);
|
|
}
|
|
|
|
return r;
|
|
}
|
|
|
|
static int radeon_sync_obj_wait(void *sync_obj, void *sync_arg,
|
|
bool lazy, bool interruptible)
|
|
{
|
|
return radeon_fence_wait((struct radeon_fence *)sync_obj, interruptible);
|
|
}
|
|
|
|
static int radeon_sync_obj_flush(void *sync_obj, void *sync_arg)
|
|
{
|
|
return 0;
|
|
}
|
|
|
|
static void radeon_sync_obj_unref(void **sync_obj)
|
|
{
|
|
radeon_fence_unref((struct radeon_fence **)sync_obj);
|
|
}
|
|
|
|
static void *radeon_sync_obj_ref(void *sync_obj)
|
|
{
|
|
return radeon_fence_ref((struct radeon_fence *)sync_obj);
|
|
}
|
|
|
|
static bool radeon_sync_obj_signaled(void *sync_obj, void *sync_arg)
|
|
{
|
|
return radeon_fence_signaled((struct radeon_fence *)sync_obj);
|
|
}
|
|
|
|
static struct ttm_bo_driver radeon_bo_driver = {
|
|
.create_ttm_backend_entry = &radeon_create_ttm_backend_entry,
|
|
.invalidate_caches = &radeon_invalidate_caches,
|
|
.init_mem_type = &radeon_init_mem_type,
|
|
.evict_flags = &radeon_evict_flags,
|
|
.move = &radeon_bo_move,
|
|
.verify_access = &radeon_verify_access,
|
|
.sync_obj_signaled = &radeon_sync_obj_signaled,
|
|
.sync_obj_wait = &radeon_sync_obj_wait,
|
|
.sync_obj_flush = &radeon_sync_obj_flush,
|
|
.sync_obj_unref = &radeon_sync_obj_unref,
|
|
.sync_obj_ref = &radeon_sync_obj_ref,
|
|
.move_notify = &radeon_bo_move_notify,
|
|
.fault_reserve_notify = &radeon_bo_fault_reserve_notify,
|
|
};
|
|
|
|
int radeon_ttm_init(struct radeon_device *rdev)
|
|
{
|
|
int r;
|
|
|
|
r = radeon_ttm_global_init(rdev);
|
|
if (r) {
|
|
return r;
|
|
}
|
|
/* No others user of address space so set it to 0 */
|
|
r = ttm_bo_device_init(&rdev->mman.bdev,
|
|
rdev->mman.bo_global_ref.ref.object,
|
|
&radeon_bo_driver, DRM_FILE_PAGE_OFFSET,
|
|
rdev->need_dma32);
|
|
if (r) {
|
|
DRM_ERROR("failed initializing buffer object driver(%d).\n", r);
|
|
return r;
|
|
}
|
|
rdev->mman.initialized = true;
|
|
r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_VRAM,
|
|
rdev->mc.real_vram_size >> PAGE_SHIFT);
|
|
if (r) {
|
|
DRM_ERROR("Failed initializing VRAM heap.\n");
|
|
return r;
|
|
}
|
|
r = radeon_bo_create(rdev, NULL, 256 * 1024, true,
|
|
RADEON_GEM_DOMAIN_VRAM,
|
|
&rdev->stollen_vga_memory);
|
|
if (r) {
|
|
return r;
|
|
}
|
|
r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
|
|
if (r)
|
|
return r;
|
|
r = radeon_bo_pin(rdev->stollen_vga_memory, RADEON_GEM_DOMAIN_VRAM, NULL);
|
|
radeon_bo_unreserve(rdev->stollen_vga_memory);
|
|
if (r) {
|
|
radeon_bo_unref(&rdev->stollen_vga_memory);
|
|
return r;
|
|
}
|
|
DRM_INFO("radeon: %uM of VRAM memory ready\n",
|
|
(unsigned)rdev->mc.real_vram_size / (1024 * 1024));
|
|
r = ttm_bo_init_mm(&rdev->mman.bdev, TTM_PL_TT,
|
|
rdev->mc.gtt_size >> PAGE_SHIFT);
|
|
if (r) {
|
|
DRM_ERROR("Failed initializing GTT heap.\n");
|
|
return r;
|
|
}
|
|
DRM_INFO("radeon: %uM of GTT memory ready.\n",
|
|
(unsigned)(rdev->mc.gtt_size / (1024 * 1024)));
|
|
if (unlikely(rdev->mman.bdev.dev_mapping == NULL)) {
|
|
rdev->mman.bdev.dev_mapping = rdev->ddev->dev_mapping;
|
|
}
|
|
|
|
r = radeon_ttm_debugfs_init(rdev);
|
|
if (r) {
|
|
DRM_ERROR("Failed to init debugfs\n");
|
|
return r;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void radeon_ttm_fini(struct radeon_device *rdev)
|
|
{
|
|
int r;
|
|
|
|
if (!rdev->mman.initialized)
|
|
return;
|
|
if (rdev->stollen_vga_memory) {
|
|
r = radeon_bo_reserve(rdev->stollen_vga_memory, false);
|
|
if (r == 0) {
|
|
radeon_bo_unpin(rdev->stollen_vga_memory);
|
|
radeon_bo_unreserve(rdev->stollen_vga_memory);
|
|
}
|
|
radeon_bo_unref(&rdev->stollen_vga_memory);
|
|
}
|
|
ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_VRAM);
|
|
ttm_bo_clean_mm(&rdev->mman.bdev, TTM_PL_TT);
|
|
ttm_bo_device_release(&rdev->mman.bdev);
|
|
radeon_gart_fini(rdev);
|
|
radeon_ttm_global_fini(rdev);
|
|
rdev->mman.initialized = false;
|
|
DRM_INFO("radeon: ttm finalized\n");
|
|
}
|
|
|
|
static struct vm_operations_struct radeon_ttm_vm_ops;
|
|
static const struct vm_operations_struct *ttm_vm_ops = NULL;
|
|
|
|
static int radeon_ttm_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
|
|
{
|
|
struct ttm_buffer_object *bo;
|
|
int r;
|
|
|
|
bo = (struct ttm_buffer_object *)vma->vm_private_data;
|
|
if (bo == NULL) {
|
|
return VM_FAULT_NOPAGE;
|
|
}
|
|
r = ttm_vm_ops->fault(vma, vmf);
|
|
return r;
|
|
}
|
|
|
|
int radeon_mmap(struct file *filp, struct vm_area_struct *vma)
|
|
{
|
|
struct drm_file *file_priv;
|
|
struct radeon_device *rdev;
|
|
int r;
|
|
|
|
if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET)) {
|
|
return drm_mmap(filp, vma);
|
|
}
|
|
|
|
file_priv = (struct drm_file *)filp->private_data;
|
|
rdev = file_priv->minor->dev->dev_private;
|
|
if (rdev == NULL) {
|
|
return -EINVAL;
|
|
}
|
|
r = ttm_bo_mmap(filp, vma, &rdev->mman.bdev);
|
|
if (unlikely(r != 0)) {
|
|
return r;
|
|
}
|
|
if (unlikely(ttm_vm_ops == NULL)) {
|
|
ttm_vm_ops = vma->vm_ops;
|
|
radeon_ttm_vm_ops = *ttm_vm_ops;
|
|
radeon_ttm_vm_ops.fault = &radeon_ttm_fault;
|
|
}
|
|
vma->vm_ops = &radeon_ttm_vm_ops;
|
|
return 0;
|
|
}
|
|
|
|
|
|
/*
|
|
* TTM backend functions.
|
|
*/
|
|
struct radeon_ttm_backend {
|
|
struct ttm_backend backend;
|
|
struct radeon_device *rdev;
|
|
unsigned long num_pages;
|
|
struct page **pages;
|
|
struct page *dummy_read_page;
|
|
bool populated;
|
|
bool bound;
|
|
unsigned offset;
|
|
};
|
|
|
|
static int radeon_ttm_backend_populate(struct ttm_backend *backend,
|
|
unsigned long num_pages,
|
|
struct page **pages,
|
|
struct page *dummy_read_page)
|
|
{
|
|
struct radeon_ttm_backend *gtt;
|
|
|
|
gtt = container_of(backend, struct radeon_ttm_backend, backend);
|
|
gtt->pages = pages;
|
|
gtt->num_pages = num_pages;
|
|
gtt->dummy_read_page = dummy_read_page;
|
|
gtt->populated = true;
|
|
return 0;
|
|
}
|
|
|
|
static void radeon_ttm_backend_clear(struct ttm_backend *backend)
|
|
{
|
|
struct radeon_ttm_backend *gtt;
|
|
|
|
gtt = container_of(backend, struct radeon_ttm_backend, backend);
|
|
gtt->pages = NULL;
|
|
gtt->num_pages = 0;
|
|
gtt->dummy_read_page = NULL;
|
|
gtt->populated = false;
|
|
gtt->bound = false;
|
|
}
|
|
|
|
|
|
static int radeon_ttm_backend_bind(struct ttm_backend *backend,
|
|
struct ttm_mem_reg *bo_mem)
|
|
{
|
|
struct radeon_ttm_backend *gtt;
|
|
int r;
|
|
|
|
gtt = container_of(backend, struct radeon_ttm_backend, backend);
|
|
gtt->offset = bo_mem->mm_node->start << PAGE_SHIFT;
|
|
if (!gtt->num_pages) {
|
|
WARN(1, "nothing to bind %lu pages for mreg %p back %p!\n", gtt->num_pages, bo_mem, backend);
|
|
}
|
|
r = radeon_gart_bind(gtt->rdev, gtt->offset,
|
|
gtt->num_pages, gtt->pages);
|
|
if (r) {
|
|
DRM_ERROR("failed to bind %lu pages at 0x%08X\n",
|
|
gtt->num_pages, gtt->offset);
|
|
return r;
|
|
}
|
|
gtt->bound = true;
|
|
return 0;
|
|
}
|
|
|
|
static int radeon_ttm_backend_unbind(struct ttm_backend *backend)
|
|
{
|
|
struct radeon_ttm_backend *gtt;
|
|
|
|
gtt = container_of(backend, struct radeon_ttm_backend, backend);
|
|
radeon_gart_unbind(gtt->rdev, gtt->offset, gtt->num_pages);
|
|
gtt->bound = false;
|
|
return 0;
|
|
}
|
|
|
|
static void radeon_ttm_backend_destroy(struct ttm_backend *backend)
|
|
{
|
|
struct radeon_ttm_backend *gtt;
|
|
|
|
gtt = container_of(backend, struct radeon_ttm_backend, backend);
|
|
if (gtt->bound) {
|
|
radeon_ttm_backend_unbind(backend);
|
|
}
|
|
kfree(gtt);
|
|
}
|
|
|
|
static struct ttm_backend_func radeon_backend_func = {
|
|
.populate = &radeon_ttm_backend_populate,
|
|
.clear = &radeon_ttm_backend_clear,
|
|
.bind = &radeon_ttm_backend_bind,
|
|
.unbind = &radeon_ttm_backend_unbind,
|
|
.destroy = &radeon_ttm_backend_destroy,
|
|
};
|
|
|
|
struct ttm_backend *radeon_ttm_backend_create(struct radeon_device *rdev)
|
|
{
|
|
struct radeon_ttm_backend *gtt;
|
|
|
|
gtt = kzalloc(sizeof(struct radeon_ttm_backend), GFP_KERNEL);
|
|
if (gtt == NULL) {
|
|
return NULL;
|
|
}
|
|
gtt->backend.bdev = &rdev->mman.bdev;
|
|
gtt->backend.flags = 0;
|
|
gtt->backend.func = &radeon_backend_func;
|
|
gtt->rdev = rdev;
|
|
gtt->pages = NULL;
|
|
gtt->num_pages = 0;
|
|
gtt->dummy_read_page = NULL;
|
|
gtt->populated = false;
|
|
gtt->bound = false;
|
|
return >t->backend;
|
|
}
|
|
|
|
#define RADEON_DEBUGFS_MEM_TYPES 2
|
|
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
static int radeon_mm_dump_table(struct seq_file *m, void *data)
|
|
{
|
|
struct drm_info_node *node = (struct drm_info_node *)m->private;
|
|
struct drm_mm *mm = (struct drm_mm *)node->info_ent->data;
|
|
struct drm_device *dev = node->minor->dev;
|
|
struct radeon_device *rdev = dev->dev_private;
|
|
int ret;
|
|
struct ttm_bo_global *glob = rdev->mman.bdev.glob;
|
|
|
|
spin_lock(&glob->lru_lock);
|
|
ret = drm_mm_dump_table(m, mm);
|
|
spin_unlock(&glob->lru_lock);
|
|
return ret;
|
|
}
|
|
#endif
|
|
|
|
static int radeon_ttm_debugfs_init(struct radeon_device *rdev)
|
|
{
|
|
#if defined(CONFIG_DEBUG_FS)
|
|
static struct drm_info_list radeon_mem_types_list[RADEON_DEBUGFS_MEM_TYPES];
|
|
static char radeon_mem_types_names[RADEON_DEBUGFS_MEM_TYPES][32];
|
|
unsigned i;
|
|
|
|
for (i = 0; i < RADEON_DEBUGFS_MEM_TYPES; i++) {
|
|
if (i == 0)
|
|
sprintf(radeon_mem_types_names[i], "radeon_vram_mm");
|
|
else
|
|
sprintf(radeon_mem_types_names[i], "radeon_gtt_mm");
|
|
radeon_mem_types_list[i].name = radeon_mem_types_names[i];
|
|
radeon_mem_types_list[i].show = &radeon_mm_dump_table;
|
|
radeon_mem_types_list[i].driver_features = 0;
|
|
if (i == 0)
|
|
radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_VRAM].manager;
|
|
else
|
|
radeon_mem_types_list[i].data = &rdev->mman.bdev.man[TTM_PL_TT].manager;
|
|
|
|
}
|
|
return radeon_debugfs_add_files(rdev, radeon_mem_types_list, RADEON_DEBUGFS_MEM_TYPES);
|
|
|
|
#endif
|
|
return 0;
|
|
}
|