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kernel-fxtec-pro1x/arch/arm/mm
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Santosh Shilimkar 2839e06c95 ARM: 6795/1: l2x0: Errata fix for flush by Way operation can cause data corrupti 
PL310 implements the Clean & Invalidate by Way L2 cache maintenance
operation (offset 0x7FC). This operation runs in background so that
PL310 can handle normal accesses while it is in progress. Under very
rare circumstances, due to this erratum, write data can be lost when
PL310 treats a cacheable write transaction during a Clean & Invalidate
by Way operation.

Workaround:
Disable Write-Back and Cache Linefill (Debug Control Register)
Clean & Invalidate by Way (0x7FC)
Re-enable Write-Back and Cache Linefill (Debug Control Register)

This patch also removes any OMAP dependency on PL310 Errata's

Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2011-03-09 00:18:34 +00:00
..
abort-ev4.S
abort-ev4t.S
abort-ev5t.S
abort-ev5tj.S
abort-ev6.S
abort-ev7.S
abort-lv4t.S
abort-macro.S
abort-nommu.S
alignment.c ARM: 6401/1: plug a race in the alignment trap handler 2010-09-23 15:17:04 +01:00
cache-fa.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-feroceon-l2.c ARM: fix cache-feroceon-l2 after stack based kmap_atomic() 2010-12-19 12:57:16 -05:00
cache-l2x0.c ARM: 6795/1: l2x0: Errata fix for flush by Way operation can cause data corrupti 2011-03-09 00:18:34 +00:00
cache-tauros2.c
cache-v3.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-v4.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-v4wb.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-v4wt.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
cache-v6.S ARM: 6535/1: V6 MPCore v6_dma_inv_range and v6_dma_flush_range RWFO fix 2010-12-14 22:23:34 +00:00
cache-v7.S ARM: 6528/1: Use CTR for the I-cache line size on ARMv7 2010-12-12 23:25:58 +00:00
cache-xsc3l2.c ARM: fix cache-xsc3l2 after stack based kmap_atomic() 2010-12-19 12:57:08 -05:00
context.c
copypage-fa.c
copypage-feroceon.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v3.c
copypage-v4mc.c ARM: 6379/1: Assume new page cache pages have dirty D-cache 2010-09-19 12:17:43 +01:00
copypage-v4wb.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v4wt.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-v6.c ARM: 6379/1: Assume new page cache pages have dirty D-cache 2010-09-19 12:17:43 +01:00
copypage-xsc3.c ARM: 6164/1: Add kto and kfrom to input operands list. 2010-06-08 19:42:18 +01:00
copypage-xscale.c ARM: 6379/1: Assume new page cache pages have dirty D-cache 2010-09-19 12:17:43 +01:00
dma-mapping.c ARM: 6622/1: fix dma_unmap_sg() documentation 2011-01-12 19:42:13 +00:00
extable.c
fault-armv.c ARM: pgtable: introduce pteval_t to represent a pte value 2010-11-26 20:45:47 +00:00
fault.c ARM: pgtable: switch order of Linux vs hardware page tables 2010-12-22 11:05:32 +00:00
fault.h
flush.c Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial 2011-01-13 10:05:56 -08:00
highmem.c ARM: get rid of kmap_high_l1_vipt() 2010-12-19 12:56:46 -05:00
idmap.c ARM: pgtable: use conventional page table code for identity mappings 2010-12-22 11:05:34 +00:00
init.c ARM: initrd: disable initrd if passed address overlaps reserved region 2011-01-31 10:53:41 +00:00
iomap.c
ioremap.c Revert "ARM: relax ioremap prohibition (309caa9) for -final and -stable" 2010-12-24 09:49:52 +00:00
Kconfig ARM: move L1_CACHE_SHIFT_6 to mm/Kconfig 2011-02-23 17:24:20 +00:00
Makefile ARM: pgtable: collect up identity mapping functions 2010-12-22 11:05:33 +00:00
mm.h ARM: pgtable: introduce pteval_t to represent a pte value 2010-11-26 20:45:47 +00:00
mmap.c ARM: implement CONFIG_STRICT_DEVMEM by disabling access to RAM via /dev/mem 2010-10-01 22:31:34 -04:00
mmu.c ARM: 6639/1: allow highmem on SMP platforms without h/w TLB ops broadcast 2011-02-23 17:24:17 +00:00
nommu.c ARM: Convert platform reservations to use LMB rather than bootmem 2010-07-27 08:48:23 +01:00
pabort-legacy.S
pabort-v6.S
pabort-v7.S
pgd.c thp: pte alloc trans splitting 2011-01-13 17:32:40 -08:00
proc-arm6_7.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm7tdmi.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm9tdmi.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm720.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm740.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-arm920.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm922.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm925.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm926.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm940.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm946.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm1020.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm1020e.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm1022.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-arm1026.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-fa526.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-feroceon.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-macros.S Merge branch 'pgt' (early part) into devel 2011-01-06 22:33:19 +00:00
proc-mohawk.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-sa110.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-sa1100.S ARM: hotplug cpu: Keep processor information, startup code & __lookup_processor_type 2010-10-08 10:07:32 +01:00
proc-syms.c
proc-v6.S Merge branch 'hotplug' into devel 2010-10-18 22:34:47 +01:00
proc-v7.S ARM: 6623/1: Thumb-2: Fix out-of-range offset for Thumb-2 in proc-v7.S 2011-01-14 09:00:30 +00:00
proc-xsc3.S ARM: 6466/1: implement flush_icache_all for the rest of the CPUs 2010-10-28 13:54:28 +01:00
proc-xscale.S ARM: pgtable: provide RDONLY page table bit rather than WRITE bit 2010-12-22 11:05:35 +00:00
tlb-fa.S
tlb-v3.S
tlb-v4.S
tlb-v4wb.S
tlb-v4wbi.S
tlb-v6.S
tlb-v7.S ARM: Allow SMP kernels to boot on UP systems 2010-10-04 20:23:36 +01:00
vmregion.c ARM: DMA: top-down allocation in DMA coherent region 2011-02-23 17:24:11 +00:00
vmregion.h ARM: DMA coherent allocator: align remapped addresses 2010-07-27 10:43:48 +01:00