5886269962
Many files include the filename at the beginning, serveral used a wrong one. Signed-off-by: Uwe Kleine-König <ukleinek@informatik.uni-freiburg.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
99 lines
2.3 KiB
C
99 lines
2.3 KiB
C
/*
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* arch/sh/kernel/cpu/sh4a/clock-sh7343.c
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*
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* SH7343/SH7722 support for the clock framework
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*
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* Copyright (C) 2006 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/io.h>
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#include <asm/clock.h>
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#include <asm/freq.h>
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/*
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* SH7343/SH7722 uses a common set of multipliers and divisors, so this
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* is quite simple..
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*/
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static int multipliers[] = { 1, 2, 1, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1 };
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static int divisors[] = { 1, 3, 2, 5, 3, 4, 5, 6, 8, 10, 12, 16, 20 };
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#define pll_calc() (((ctrl_inl(FRQCR) >> 24) & 0x1f) + 1)
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static void master_clk_init(struct clk *clk)
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{
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clk->parent = clk_get(NULL, "cpu_clk");
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}
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static void master_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inl(FRQCR) & 0x000f);
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clk->rate *= clk->parent->rate * multipliers[idx] / divisors[idx];
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}
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static struct clk_ops sh7343_master_clk_ops = {
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.init = master_clk_init,
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.recalc = master_clk_recalc,
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};
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static void module_clk_init(struct clk *clk)
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{
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clk->parent = NULL;
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clk->rate = CONFIG_SH_PCLK_FREQ;
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}
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static struct clk_ops sh7343_module_clk_ops = {
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.init = module_clk_init,
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};
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static void bus_clk_init(struct clk *clk)
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{
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clk->parent = clk_get(NULL, "cpu_clk");
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}
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static void bus_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inl(FRQCR) >> 8) & 0x000f;
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clk->rate = clk->parent->rate * multipliers[idx] / divisors[idx];
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}
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static struct clk_ops sh7343_bus_clk_ops = {
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.init = bus_clk_init,
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.recalc = bus_clk_recalc,
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};
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static void cpu_clk_init(struct clk *clk)
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{
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clk->parent = clk_get(NULL, "module_clk");
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clk->flags |= CLK_RATE_PROPAGATES;
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clk_set_rate(clk, clk_get_rate(clk));
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}
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static void cpu_clk_recalc(struct clk *clk)
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{
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int idx = (ctrl_inl(FRQCR) >> 20) & 0x000f;
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clk->rate = clk->parent->rate * pll_calc() *
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multipliers[idx] / divisors[idx];
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}
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static struct clk_ops sh7343_cpu_clk_ops = {
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.init = cpu_clk_init,
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.recalc = cpu_clk_recalc,
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};
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static struct clk_ops *sh7343_clk_ops[] = {
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&sh7343_master_clk_ops,
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&sh7343_module_clk_ops,
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&sh7343_bus_clk_ops,
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&sh7343_cpu_clk_ops,
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};
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void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
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{
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if (idx < ARRAY_SIZE(sh7343_clk_ops))
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*ops = sh7343_clk_ops[idx];
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}
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