The HDMI codec on NVIDIA Tegra SoCs has a feature that doesn't exist on
the MCP or GPU variants. The highest bit in the vendor-defined scratch
registers can be used to trigger an interrupt in the HDMI codec, which
is signalled to the HDMI driver. This can be used to pass information,
such as the HDA format, to the HDMI driver so that it can reconfigure
itself accordingly.
While at it, change the name of the codec to Tegra124 since there are no
other SoCs in the Tegra12x family. There isn't really a Tegra12x family.
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>