kernel-fxtec-pro1x/arch/alpha/include/asm/core_irongate.h
Greg Kroah-Hartman b24413180f License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Many source files in the tree are missing licensing information, which
makes it harder for compliance tools to determine the correct license.

By default all files without license information are under the default
license of the kernel, which is GPL version 2.

Update the files which contain no license information with the 'GPL-2.0'
SPDX license identifier.  The SPDX identifier is a legally binding
shorthand, which can be used instead of the full boiler plate text.

This patch is based on work done by Thomas Gleixner and Kate Stewart and
Philippe Ombredanne.

How this work was done:

Patches were generated and checked against linux-4.14-rc6 for a subset of
the use cases:
 - file had no licensing information it it.
 - file was a */uapi/* one with no licensing information in it,
 - file was a */uapi/* one with existing licensing information,

Further patches will be generated in subsequent months to fix up cases
where non-standard license headers were used, and references to license
had to be inferred by heuristics based on keywords.

The analysis to determine which SPDX License Identifier to be applied to
a file was done in a spreadsheet of side by side results from of the
output of two independent scanners (ScanCode & Windriver) producing SPDX
tag:value files created by Philippe Ombredanne.  Philippe prepared the
base worksheet, and did an initial spot review of a few 1000 files.

The 4.13 kernel was the starting point of the analysis with 60,537 files
assessed.  Kate Stewart did a file by file comparison of the scanner
results in the spreadsheet to determine which SPDX license identifier(s)
to be applied to the file. She confirmed any determination that was not
immediately clear with lawyers working with the Linux Foundation.

Criteria used to select files for SPDX license identifier tagging was:
 - Files considered eligible had to be source code files.
 - Make and config files were included as candidates if they contained >5
   lines of source
 - File already had some variant of a license header in it (even if <5
   lines).

All documentation files were explicitly excluded.

The following heuristics were used to determine which SPDX license
identifiers to apply.

 - when both scanners couldn't find any license traces, file was
   considered to have no license information in it, and the top level
   COPYING file license applied.

   For non */uapi/* files that summary was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0                                              11139

   and resulted in the first patch in this series.

   If that file was a */uapi/* path one, it was "GPL-2.0 WITH
   Linux-syscall-note" otherwise it was "GPL-2.0".  Results of that was:

   SPDX license identifier                            # files
   ---------------------------------------------------|-------
   GPL-2.0 WITH Linux-syscall-note                        930

   and resulted in the second patch in this series.

 - if a file had some form of licensing information in it, and was one
   of the */uapi/* ones, it was denoted with the Linux-syscall-note if
   any GPL family license was found in the file or had no licensing in
   it (per prior point).  Results summary:

   SPDX license identifier                            # files
   ---------------------------------------------------|------
   GPL-2.0 WITH Linux-syscall-note                       270
   GPL-2.0+ WITH Linux-syscall-note                      169
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-2-Clause)    21
   ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)    17
   LGPL-2.1+ WITH Linux-syscall-note                      15
   GPL-1.0+ WITH Linux-syscall-note                       14
   ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-Clause)    5
   LGPL-2.0+ WITH Linux-syscall-note                       4
   LGPL-2.1 WITH Linux-syscall-note                        3
   ((GPL-2.0 WITH Linux-syscall-note) OR MIT)              3
   ((GPL-2.0 WITH Linux-syscall-note) AND MIT)             1

   and that resulted in the third patch in this series.

 - when the two scanners agreed on the detected license(s), that became
   the concluded license(s).

 - when there was disagreement between the two scanners (one detected a
   license but the other didn't, or they both detected different
   licenses) a manual inspection of the file occurred.

 - In most cases a manual inspection of the information in the file
   resulted in a clear resolution of the license that should apply (and
   which scanner probably needed to revisit its heuristics).

 - When it was not immediately clear, the license identifier was
   confirmed with lawyers working with the Linux Foundation.

 - If there was any question as to the appropriate license identifier,
   the file was flagged for further research and to be revisited later
   in time.

In total, over 70 hours of logged manual review was done on the
spreadsheet to determine the SPDX license identifiers to apply to the
source files by Kate, Philippe, Thomas and, in some cases, confirmation
by lawyers working with the Linux Foundation.

Kate also obtained a third independent scan of the 4.13 code base from
FOSSology, and compared selected files where the other two scanners
disagreed against that SPDX file, to see if there was new insights.  The
Windriver scanner is based on an older version of FOSSology in part, so
they are related.

Thomas did random spot checks in about 500 files from the spreadsheets
for the uapi headers and agreed with SPDX license identifier in the
files he inspected. For the non-uapi files Thomas did random spot checks
in about 15000 files.

In initial set of patches against 4.14-rc6, 3 files were found to have
copy/paste license identifier errors, and have been fixed to reflect the
correct identifier.

Additionally Philippe spent 10 hours this week doing a detailed manual
inspection and review of the 12,461 patched files from the initial patch
version early this week with:
 - a full scancode scan run, collecting the matched texts, detected
   license ids and scores
 - reviewing anything where there was a license detected (about 500+
   files) to ensure that the applied SPDX license was correct
 - reviewing anything where there was no detection but the patch license
   was not GPL-2.0 WITH Linux-syscall-note to ensure that the applied
   SPDX license was correct

This produced a worksheet with 20 files needing minor correction.  This
worksheet was then exported into 3 different .csv files for the
different types of files to be modified.

These .csv files were then reviewed by Greg.  Thomas wrote a script to
parse the csv files and add the proper SPDX tag to the file, in the
format that the file expected.  This script was further refined by Greg
based on the output to detect more types of files automatically and to
distinguish between header and source .c files (which need different
comment types.)  Finally Greg ran the script using the .csv files to
generate the patches.

Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Philippe Ombredanne <pombredanne@nexb.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-11-02 11:10:55 +01:00

233 lines
6.6 KiB
C

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef __ALPHA_IRONGATE__H__
#define __ALPHA_IRONGATE__H__
#include <linux/types.h>
#include <asm/compiler.h>
/*
* IRONGATE is the internal name for the AMD-751 K7 core logic chipset
* which provides memory controller and PCI access for NAUTILUS-based
* EV6 (21264) systems.
*
* This file is based on:
*
* IronGate management library, (c) 1999 Alpha Processor, Inc.
* Copyright (C) 1999 Alpha Processor, Inc.,
* (David Daniel, Stig Telfer, Soohoon Lee)
*/
/*
* The 21264 supports, and internally recognizes, a 44-bit physical
* address space that is divided equally between memory address space
* and I/O address space. Memory address space resides in the lower
* half of the physical address space (PA[43]=0) and I/O address space
* resides in the upper half of the physical address space (PA[43]=1).
*/
/*
* Irongate CSR map. Some of the CSRs are 8 or 16 bits, but all access
* through the routines given is 32-bit.
*
* The first 0x40 bytes are standard as per the PCI spec.
*/
typedef volatile __u32 igcsr32;
typedef struct {
igcsr32 dev_vendor; /* 0x00 - device ID, vendor ID */
igcsr32 stat_cmd; /* 0x04 - status, command */
igcsr32 class; /* 0x08 - class code, rev ID */
igcsr32 latency; /* 0x0C - header type, PCI latency */
igcsr32 bar0; /* 0x10 - BAR0 - AGP */
igcsr32 bar1; /* 0x14 - BAR1 - GART */
igcsr32 bar2; /* 0x18 - Power Management reg block */
igcsr32 rsrvd0[6]; /* 0x1C-0x33 reserved */
igcsr32 capptr; /* 0x34 - Capabilities pointer */
igcsr32 rsrvd1[2]; /* 0x38-0x3F reserved */
igcsr32 bacsr10; /* 0x40 - base address chip selects */
igcsr32 bacsr32; /* 0x44 - base address chip selects */
igcsr32 bacsr54_eccms761; /* 0x48 - 751: base addr. chip selects
761: ECC, mode/status */
igcsr32 rsrvd2[1]; /* 0x4C-0x4F reserved */
igcsr32 drammap; /* 0x50 - address mapping control */
igcsr32 dramtm; /* 0x54 - timing, driver strength */
igcsr32 dramms; /* 0x58 - DRAM mode/status */
igcsr32 rsrvd3[1]; /* 0x5C-0x5F reserved */
igcsr32 biu0; /* 0x60 - bus interface unit */
igcsr32 biusip; /* 0x64 - Serial initialisation pkt */
igcsr32 rsrvd4[2]; /* 0x68-0x6F reserved */
igcsr32 mro; /* 0x70 - memory request optimiser */
igcsr32 rsrvd5[3]; /* 0x74-0x7F reserved */
igcsr32 whami; /* 0x80 - who am I */
igcsr32 pciarb; /* 0x84 - PCI arbitration control */
igcsr32 pcicfg; /* 0x88 - PCI config status */
igcsr32 rsrvd6[4]; /* 0x8C-0x9B reserved */
igcsr32 pci_mem; /* 0x9C - PCI top of memory,
761 only */
/* AGP (bus 1) control registers */
igcsr32 agpcap; /* 0xA0 - AGP Capability Identifier */
igcsr32 agpstat; /* 0xA4 - AGP status register */
igcsr32 agpcmd; /* 0xA8 - AGP control register */
igcsr32 agpva; /* 0xAC - AGP Virtual Address Space */
igcsr32 agpmode; /* 0xB0 - AGP/GART mode control */
} Irongate0;
typedef struct {
igcsr32 dev_vendor; /* 0x00 - Device and Vendor IDs */
igcsr32 stat_cmd; /* 0x04 - Status and Command regs */
igcsr32 class; /* 0x08 - subclass, baseclass etc */
igcsr32 htype; /* 0x0C - header type (at 0x0E) */
igcsr32 rsrvd0[2]; /* 0x10-0x17 reserved */
igcsr32 busnos; /* 0x18 - Primary, secondary bus nos */
igcsr32 io_baselim_regs; /* 0x1C - IO base, IO lim, AGP status */
igcsr32 mem_baselim; /* 0x20 - memory base, memory lim */
igcsr32 pfmem_baselim; /* 0x24 - prefetchable base, lim */
igcsr32 rsrvd1[2]; /* 0x28-0x2F reserved */
igcsr32 io_baselim; /* 0x30 - IO base, IO limit */
igcsr32 rsrvd2[2]; /* 0x34-0x3B - reserved */
igcsr32 interrupt; /* 0x3C - interrupt, PCI bridge ctrl */
} Irongate1;
extern igcsr32 *IronECC;
/*
* Memory spaces:
*/
/* Irongate is consistent with a subset of the Tsunami memory map */
#ifdef USE_48_BIT_KSEG
#define IRONGATE_BIAS 0x80000000000UL
#else
#define IRONGATE_BIAS 0x10000000000UL
#endif
#define IRONGATE_MEM (IDENT_ADDR | IRONGATE_BIAS | 0x000000000UL)
#define IRONGATE_IACK_SC (IDENT_ADDR | IRONGATE_BIAS | 0x1F8000000UL)
#define IRONGATE_IO (IDENT_ADDR | IRONGATE_BIAS | 0x1FC000000UL)
#define IRONGATE_CONF (IDENT_ADDR | IRONGATE_BIAS | 0x1FE000000UL)
/*
* PCI Configuration space accesses are formed like so:
*
* 0x1FE << 24 | : 2 2 2 2 1 1 1 1 : 1 1 1 1 1 1 0 0 : 0 0 0 0 0 0 0 0 :
* : 3 2 1 0 9 8 7 6 : 5 4 3 2 1 0 9 8 : 7 6 5 4 3 2 1 0 :
* ---bus numer--- -device-- -fun- ---register----
*/
#define IGCSR(dev,fun,reg) ( IRONGATE_CONF | \
((dev)<<11) | \
((fun)<<8) | \
(reg) )
#define IRONGATE0 ((Irongate0 *) IGCSR(0, 0, 0))
#define IRONGATE1 ((Irongate1 *) IGCSR(1, 0, 0))
/*
* Data structure for handling IRONGATE machine checks:
* This is the standard OSF logout frame
*/
#define SCB_Q_SYSERR 0x620 /* OSF definitions */
#define SCB_Q_PROCERR 0x630
#define SCB_Q_SYSMCHK 0x660
#define SCB_Q_PROCMCHK 0x670
struct el_IRONGATE_sysdata_mcheck {
__u32 FrameSize; /* Bytes, including this field */
__u32 FrameFlags; /* <31> = Retry, <30> = Second Error */
__u32 CpuOffset; /* Offset to CPU-specific into */
__u32 SystemOffset; /* Offset to system-specific info */
__u32 MCHK_Code;
__u32 MCHK_Frame_Rev;
__u64 I_STAT;
__u64 DC_STAT;
__u64 C_ADDR;
__u64 DC1_SYNDROME;
__u64 DC0_SYNDROME;
__u64 C_STAT;
__u64 C_STS;
__u64 RESERVED0;
__u64 EXC_ADDR;
__u64 IER_CM;
__u64 ISUM;
__u64 MM_STAT;
__u64 PAL_BASE;
__u64 I_CTL;
__u64 PCTX;
};
#ifdef __KERNEL__
#ifndef __EXTERN_INLINE
#define __EXTERN_INLINE extern inline
#define __IO_EXTERN_INLINE
#endif
/*
* I/O functions:
*
* IRONGATE (AMD-751) PCI/memory support chip for the EV6 (21264) and
* K7 can only use linear accesses to get at PCI memory and I/O spaces.
*/
/*
* Memory functions. All accesses are done through linear space.
*/
__EXTERN_INLINE void __iomem *irongate_ioportmap(unsigned long addr)
{
return (void __iomem *)(addr + IRONGATE_IO);
}
extern void __iomem *irongate_ioremap(unsigned long addr, unsigned long size);
extern void irongate_iounmap(volatile void __iomem *addr);
__EXTERN_INLINE int irongate_is_ioaddr(unsigned long addr)
{
return addr >= IRONGATE_MEM;
}
__EXTERN_INLINE int irongate_is_mmio(const volatile void __iomem *xaddr)
{
unsigned long addr = (unsigned long)xaddr;
return addr < IRONGATE_IO || addr >= IRONGATE_CONF;
}
#undef __IO_PREFIX
#define __IO_PREFIX irongate
#define irongate_trivial_rw_bw 1
#define irongate_trivial_rw_lq 1
#define irongate_trivial_io_bw 1
#define irongate_trivial_io_lq 1
#define irongate_trivial_iounmap 0
#include <asm/io_trivial.h>
#ifdef __IO_EXTERN_INLINE
#undef __EXTERN_INLINE
#undef __IO_EXTERN_INLINE
#endif
#endif /* __KERNEL__ */
#endif /* __ALPHA_IRONGATE__H__ */