6d36e8e08f
The SDIO interface is only available on pins MPP30/31/32/33/34/35 on the various Armada XP variants, so we provide a pin muxing option for this in the Armada XP .dtsi files. Even though those muxing options are the same for MV78230, MV78260 and MV78460, we keep them in each .dtsi file, because the number of pins, and therefore the declaration of the pinctrl node, is different for each SoC variant. Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
80 lines
1.7 KiB
Text
80 lines
1.7 KiB
Text
/*
|
|
* Device Tree Include file for Marvell Armada XP family SoC
|
|
*
|
|
* Copyright (C) 2012 Marvell
|
|
*
|
|
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
|
|
*
|
|
* This file is licensed under the terms of the GNU General Public
|
|
* License version 2. This program is licensed "as is" without any
|
|
* warranty of any kind, whether express or implied.
|
|
*
|
|
* Contains definitions specific to the Armada XP MV78230 SoC that are not
|
|
* common to all Armada XP SoCs.
|
|
*/
|
|
|
|
/include/ "armada-xp.dtsi"
|
|
|
|
/ {
|
|
model = "Marvell Armada XP MV78230 SoC";
|
|
compatible = "marvell,armadaxp-mv78230", "marvell,armadaxp", "marvell,armada-370-xp";
|
|
|
|
aliases {
|
|
gpio0 = &gpio0;
|
|
gpio1 = &gpio1;
|
|
};
|
|
|
|
cpus {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
cpu@0 {
|
|
device_type = "cpu";
|
|
compatible = "marvell,sheeva-v7";
|
|
reg = <0>;
|
|
clocks = <&cpuclk 0>;
|
|
};
|
|
|
|
cpu@1 {
|
|
device_type = "cpu";
|
|
compatible = "marvell,sheeva-v7";
|
|
reg = <1>;
|
|
clocks = <&cpuclk 1>;
|
|
};
|
|
};
|
|
|
|
soc {
|
|
pinctrl {
|
|
compatible = "marvell,mv78230-pinctrl";
|
|
reg = <0xd0018000 0x38>;
|
|
|
|
sdio_pins: sdio-pins {
|
|
marvell,pins = "mpp30", "mpp31", "mpp32",
|
|
"mpp33", "mpp34", "mpp35";
|
|
marvell,function = "sd0";
|
|
};
|
|
};
|
|
|
|
gpio0: gpio@d0018100 {
|
|
compatible = "marvell,orion-gpio";
|
|
reg = <0xd0018100 0x40>;
|
|
ngpios = <32>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupts-cells = <2>;
|
|
interrupts = <82>, <83>, <84>, <85>;
|
|
};
|
|
|
|
gpio1: gpio@d0018140 {
|
|
compatible = "marvell,orion-gpio";
|
|
reg = <0xd0018140 0x40>;
|
|
ngpios = <17>;
|
|
gpio-controller;
|
|
#gpio-cells = <2>;
|
|
interrupt-controller;
|
|
#interrupts-cells = <2>;
|
|
interrupts = <87>, <88>, <89>;
|
|
};
|
|
};
|
|
};
|