22b1d707ff
Move arch/mips/{jmr3927,tx4927,tx4938} into arch/mips/txx9/ tree.
This will help more code sharing and maintainance.
Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
139 lines
4.2 KiB
C
139 lines
4.2 KiB
C
/*
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*
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* BRIEF MODULE DESCRIPTION
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* Board specific pci fixups for the Toshiba rbtx4927
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*
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* Copyright 2001 MontaVista Software Inc.
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* Author: MontaVista Software, Inc.
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* ppopov@mvista.com or source@mvista.com
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*
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* Copyright (C) 2000-2001 Toshiba Corporation
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*
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* Copyright (C) 2004 MontaVista Software Inc.
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* Author: Manish Lachwani (mlachwani@mvista.com)
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/txx9/tx4927.h>
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#undef DEBUG
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#ifdef DEBUG
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#define DBG(x...) printk(x)
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#else
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#define DBG(x...)
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#endif
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/* look up table for backplane pci irq for slots 17-20 by pin # */
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static unsigned char backplane_pci_irq[4][4] = {
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/* PJ6 SLOT: 17, PIN: 1 */ {TX4927_IRQ_IOC_PCIA,
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/* PJ6 SLOT: 17, PIN: 2 */
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TX4927_IRQ_IOC_PCIB,
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/* PJ6 SLOT: 17, PIN: 3 */
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TX4927_IRQ_IOC_PCIC,
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/* PJ6 SLOT: 17, PIN: 4 */
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TX4927_IRQ_IOC_PCID},
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/* SB SLOT: 18, PIN: 1 */ {TX4927_IRQ_IOC_PCIB,
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/* SB SLOT: 18, PIN: 2 */
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TX4927_IRQ_IOC_PCIC,
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/* SB SLOT: 18, PIN: 3 */
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TX4927_IRQ_IOC_PCID,
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/* SB SLOT: 18, PIN: 4 */
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TX4927_IRQ_IOC_PCIA},
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/* PJ5 SLOT: 19, PIN: 1 */ {TX4927_IRQ_IOC_PCIC,
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/* PJ5 SLOT: 19, PIN: 2 */
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TX4927_IRQ_IOC_PCID,
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/* PJ5 SLOT: 19, PIN: 3 */
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TX4927_IRQ_IOC_PCIA,
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/* PJ5 SLOT: 19, PIN: 4 */
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TX4927_IRQ_IOC_PCIB},
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/* PJ4 SLOT: 20, PIN: 1 */ {TX4927_IRQ_IOC_PCID,
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/* PJ4 SLOT: 20, PIN: 2 */
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TX4927_IRQ_IOC_PCIA,
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/* PJ4 SLOT: 20, PIN: 3 */
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TX4927_IRQ_IOC_PCIB,
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/* PJ4 SLOT: 20, PIN: 4 */
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TX4927_IRQ_IOC_PCIC}
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};
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static int pci_get_irq(const struct pci_dev *dev, int pin)
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{
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unsigned char irq = pin;
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DBG("pci_get_irq: pin is %d\n", pin);
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/* IRQ rotation */
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irq--; /* 0-3 */
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if (dev->bus->parent == NULL &&
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PCI_SLOT(dev->devfn) == TX4927_PCIC_IDSEL_AD_TO_SLOT(23)) {
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printk("Onboard PCI_SLOT(dev->devfn) is %d\n",
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PCI_SLOT(dev->devfn));
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/* IDSEL=A23 is tx4927 onboard pci slot */
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irq = (irq + PCI_SLOT(dev->devfn)) % 4;
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irq++; /* 1-4 */
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DBG("irq is now %d\n", irq);
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switch (irq) {
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case 1:
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irq = TX4927_IRQ_IOC_PCIA;
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break;
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case 2:
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irq = TX4927_IRQ_IOC_PCIB;
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break;
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case 3:
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irq = TX4927_IRQ_IOC_PCIC;
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break;
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case 4:
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irq = TX4927_IRQ_IOC_PCID;
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break;
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}
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} else {
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/* PCI Backplane */
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DBG("PCI Backplane PCI_SLOT(dev->devfn) is %d\n",
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PCI_SLOT(dev->devfn));
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irq = backplane_pci_irq[PCI_SLOT(dev->devfn) - 17][irq];
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}
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DBG("assigned irq %d\n", irq);
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return irq;
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}
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int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
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{
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unsigned char irq;
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printk("PCI Setup for pin %d \n", pin);
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if (dev->device == 0x9130) /* IDE */
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irq = 14;
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else
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irq = pci_get_irq(dev, pin);
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return irq;
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}
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/* Do platform specific device initialization at pci_enable_device() time */
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int pcibios_plat_dev_init(struct pci_dev *dev)
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{
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return 0;
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}
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