f7018c2135
The drivers/video directory is a mess. It contains generic video related files, directories for backlight, console, linux logo, lots of fbdev device drivers, fbdev framework files. Make some order into the chaos by creating drivers/video/fbdev directory, and move all fbdev related files there. No functionality is changed, although I guess it is possible that some subtle Makefile build order related issue could be created by this patch. Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org> Acked-by: Rob Clark <robdclark@gmail.com> Acked-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch>
61 lines
1.9 KiB
C
61 lines
1.9 KiB
C
/*
|
|
* linux/drivers/video/kyro/STG4000Interface.h
|
|
*
|
|
* Copyright (C) 2002 STMicroelectronics
|
|
*
|
|
* This file is subject to the terms and conditions of the GNU General Public
|
|
* License. See the file COPYING in the main directory of this archive
|
|
* for more details.
|
|
*/
|
|
|
|
#ifndef _STG4000INTERFACE_H
|
|
#define _STG4000INTERFACE_H
|
|
|
|
#include <linux/pci.h>
|
|
#include <video/kyro.h>
|
|
|
|
/*
|
|
* Ramdac Setup
|
|
*/
|
|
extern int InitialiseRamdac(volatile STG4000REG __iomem *pSTGReg, u32 displayDepth,
|
|
u32 displayWidth, u32 displayHeight,
|
|
s32 HSyncPolarity, s32 VSyncPolarity,
|
|
u32 *pixelClock);
|
|
|
|
extern void DisableRamdacOutput(volatile STG4000REG __iomem *pSTGReg);
|
|
extern void EnableRamdacOutput(volatile STG4000REG __iomem *pSTGReg);
|
|
|
|
/*
|
|
* Timing generator setup
|
|
*/
|
|
extern void DisableVGA(volatile STG4000REG __iomem *pSTGReg);
|
|
extern void StopVTG(volatile STG4000REG __iomem *pSTGReg);
|
|
extern void StartVTG(volatile STG4000REG __iomem *pSTGReg);
|
|
extern void SetupVTG(volatile STG4000REG __iomem *pSTGReg,
|
|
const struct kyrofb_info * pTiming);
|
|
|
|
extern u32 ProgramClock(u32 refClock, u32 coreClock, u32 *FOut, u32 *ROut, u32 *POut);
|
|
extern int SetCoreClockPLL(volatile STG4000REG __iomem *pSTGReg, struct pci_dev *pDev);
|
|
|
|
/*
|
|
* Overlay setup
|
|
*/
|
|
extern void ResetOverlayRegisters(volatile STG4000REG __iomem *pSTGReg);
|
|
|
|
extern int CreateOverlaySurface(volatile STG4000REG __iomem *pSTGReg,
|
|
u32 ulWidth, u32 ulHeight,
|
|
int bLinear,
|
|
u32 ulOverlayOffset,
|
|
u32 * retStride, u32 * retUVStride);
|
|
|
|
extern int SetOverlayBlendMode(volatile STG4000REG __iomem *pSTGReg,
|
|
OVRL_BLEND_MODE mode,
|
|
u32 ulAlpha, u32 ulColorKey);
|
|
|
|
extern int SetOverlayViewPort(volatile STG4000REG __iomem *pSTGReg,
|
|
u32 left, u32 top,
|
|
u32 right, u32 bottom);
|
|
|
|
extern void EnableOverlayPlane(volatile STG4000REG __iomem *pSTGReg);
|
|
|
|
#endif /* _STG4000INTERFACE_H */
|