9a32299394
The bestcomm dma hardware, and some of its users like the FEC ethernet component, is used in different FreeScale parts, including non-powerpc parts like the ColdFire MCF547x & MCF548x families. Don't keep the driver hidden in arch/powerpc where it is inaccessible for other arches. .c files are moved to drivers/dma/bestcomm, while .h files are moved to include/linux/fsl/bestcomm. Makefiles, Kconfigs and #include directives are updated for the new file locations. Tested by recompiling for MPC5200 with all bestcomm users enabled. Signed-off-by: Philippe De Muyter <phdm@macqel.be> Signed-off-by: Anatolij Gustschin <agust@denx.de>
63 lines
1.9 KiB
C
63 lines
1.9 KiB
C
/*
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* Bestcomm GenBD RX task microcode
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*
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* Copyright (C) 2006 AppSpec Computer Technologies Corp.
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* Jeff Gibbons <jeff.gibbons@appspec.com>
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* by the Free Software Foundation.
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*
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* Based on BestCommAPI-2.2/code_dma/image_rtos1/dma_image.hex
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* on Tue Mar 4 10:14:12 2006 GMT
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*
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*/
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#include <asm/types.h>
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/*
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* The header consists of the following fields:
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* u32 magic;
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* u8 desc_size;
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* u8 var_size;
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* u8 inc_size;
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* u8 first_var;
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* u8 reserved[8];
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*
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* The size fields contain the number of 32-bit words.
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*/
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u32 bcom_gen_bd_rx_task[] = {
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/* header */
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0x4243544b,
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0x0d020409,
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0x00000000,
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0x00000000,
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/* Task descriptors */
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0x808220da, /* LCD: idx0 = var1, idx1 = var4; idx1 <= var3; idx0 += inc3, idx1 += inc2 */
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0x13e01010, /* DRD1A: var4 = var2; FN=0 MORE init=31 WS=0 RS=0 */
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0xb880025b, /* LCD: idx2 = *idx1, idx3 = var0; idx2 < var9; idx2 += inc3, idx3 += inc3 */
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0x10001308, /* DRD1A: var4 = idx1; FN=0 MORE init=0 WS=0 RS=0 */
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0x60140002, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=2 EXT init=0 WS=2 RS=2 */
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0x0cccfcca, /* DRD2B1: *idx3 = EU3(); EU3(*idx3,var10) */
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0xd9190240, /* LCDEXT: idx2 = idx2; idx2 > var9; idx2 += inc0 */
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0xb8c5e009, /* LCD: idx3 = *(idx1 + var00000015); ; idx3 += inc1 */
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0x07fecf80, /* DRD1A: *idx3 = *idx0; FN=0 INT init=31 WS=3 RS=3 */
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0x99190024, /* LCD: idx2 = idx2; idx2 once var0; idx2 += inc4 */
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0x60000005, /* DRD2A: EU0=0 EU1=0 EU2=0 EU3=5 EXT init=0 WS=0 RS=0 */
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0x0c4cf889, /* DRD2B1: *idx1 = EU3(); EU3(idx2,var9) */
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0x000001f8, /* NOP */
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/* VAR[9]-VAR[10] */
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0x40000000,
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0x7fff7fff,
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/* INC[0]-INC[3] */
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0x40000000,
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0xe0000000,
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0xa0000008,
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0x20000000,
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};
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