15ac408ee5
OMAP tags are deprecrated so drop them. Drop UART config data which decides which UARTs to enable during boot. This is no longer necessary since serial core code disables clocks after inactivity. Background: with new UART idle code, all on-chip UARTs are idled using a configurable inactivity timer (default 5 seconds.) After the inactivity timer, UART clocks are disabled automatically. Signed-off-by: Kalle Valo <kalle.valo@iki.fi> Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
349 lines
8.1 KiB
C
349 lines
8.1 KiB
C
/*
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* linux/arch/arm/mach-omap1/board-fsample.c
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*
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* Modified from board-perseus2.c
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*
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* Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
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* Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/delay.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/input.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/flash.h>
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#include <asm/mach/map.h>
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#include <mach/tc.h>
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#include <mach/gpio.h>
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#include <mach/mux.h>
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#include <mach/fpga.h>
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#include <mach/nand.h>
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#include <mach/keypad.h>
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#include <mach/common.h>
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#include <mach/board.h>
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/* fsample is pretty close to p2-sample */
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#define fsample_cpld_read(reg) __raw_readb(reg)
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#define fsample_cpld_write(val, reg) __raw_writeb(val, reg)
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#define FSAMPLE_CPLD_BASE 0xE8100000
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#define FSAMPLE_CPLD_SIZE SZ_4K
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#define FSAMPLE_CPLD_START 0x05080000
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#define FSAMPLE_CPLD_REG_A (FSAMPLE_CPLD_BASE + 0x00)
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#define FSAMPLE_CPLD_SWITCH (FSAMPLE_CPLD_BASE + 0x02)
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#define FSAMPLE_CPLD_UART (FSAMPLE_CPLD_BASE + 0x02)
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#define FSAMPLE_CPLD_REG_B (FSAMPLE_CPLD_BASE + 0x04)
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#define FSAMPLE_CPLD_VERSION (FSAMPLE_CPLD_BASE + 0x06)
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#define FSAMPLE_CPLD_SET_CLR (FSAMPLE_CPLD_BASE + 0x06)
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#define FSAMPLE_CPLD_BIT_BT_RESET 0
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#define FSAMPLE_CPLD_BIT_LCD_RESET 1
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#define FSAMPLE_CPLD_BIT_CAM_PWDN 2
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#define FSAMPLE_CPLD_BIT_CHARGER_ENABLE 3
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#define FSAMPLE_CPLD_BIT_SD_MMC_EN 4
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#define FSAMPLE_CPLD_BIT_aGPS_PWREN 5
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#define FSAMPLE_CPLD_BIT_BACKLIGHT 6
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#define FSAMPLE_CPLD_BIT_aGPS_EN_RESET 7
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#define FSAMPLE_CPLD_BIT_aGPS_SLEEPx_N 8
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#define FSAMPLE_CPLD_BIT_OTG_RESET 9
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#define fsample_cpld_set(bit) \
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fsample_cpld_write((((bit) & 15) << 4) | 0x0f, FSAMPLE_CPLD_SET_CLR)
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#define fsample_cpld_clear(bit) \
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fsample_cpld_write(0xf0 | ((bit) & 15), FSAMPLE_CPLD_SET_CLR)
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static int fsample_keymap[] = {
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KEY(0,0,KEY_UP),
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KEY(0,1,KEY_RIGHT),
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KEY(0,2,KEY_LEFT),
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KEY(0,3,KEY_DOWN),
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KEY(0,4,KEY_ENTER),
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KEY(1,0,KEY_F10),
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KEY(1,1,KEY_SEND),
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KEY(1,2,KEY_END),
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KEY(1,3,KEY_VOLUMEDOWN),
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KEY(1,4,KEY_VOLUMEUP),
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KEY(1,5,KEY_RECORD),
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KEY(2,0,KEY_F9),
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KEY(2,1,KEY_3),
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KEY(2,2,KEY_6),
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KEY(2,3,KEY_9),
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KEY(2,4,KEY_KPDOT),
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KEY(3,0,KEY_BACK),
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KEY(3,1,KEY_2),
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KEY(3,2,KEY_5),
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KEY(3,3,KEY_8),
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KEY(3,4,KEY_0),
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KEY(3,5,KEY_KPSLASH),
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KEY(4,0,KEY_HOME),
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KEY(4,1,KEY_1),
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KEY(4,2,KEY_4),
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KEY(4,3,KEY_7),
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KEY(4,4,KEY_KPASTERISK),
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KEY(4,5,KEY_POWER),
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0
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};
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = H2P2_DBG_FPGA_ETHR_START, /* Physical */
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.end = H2P2_DBG_FPGA_ETHR_START + 0xf,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = INT_730_MPU_EXT_NIRQ,
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.end = 0,
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.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
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},
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};
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static struct mtd_partition nor_partitions[] = {
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/* bootloader (U-Boot, etc) in first sector */
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{
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.name = "bootloader",
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.offset = 0,
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.size = SZ_128K,
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.mask_flags = MTD_WRITEABLE, /* force read-only */
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},
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/* bootloader params in the next sector */
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{
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.name = "params",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_128K,
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.mask_flags = 0,
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},
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/* kernel */
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{
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.name = "kernel",
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.offset = MTDPART_OFS_APPEND,
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.size = SZ_2M,
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.mask_flags = 0
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},
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/* rest of flash is a file system */
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_APPEND,
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.size = MTDPART_SIZ_FULL,
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.mask_flags = 0
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},
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};
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static struct flash_platform_data nor_data = {
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.map_name = "cfi_probe",
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.width = 2,
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.parts = nor_partitions,
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.nr_parts = ARRAY_SIZE(nor_partitions),
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};
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static struct resource nor_resource = {
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.start = OMAP_CS0_PHYS,
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.end = OMAP_CS0_PHYS + SZ_32M - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device nor_device = {
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.name = "omapflash",
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.id = 0,
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.dev = {
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.platform_data = &nor_data,
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},
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.num_resources = 1,
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.resource = &nor_resource,
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};
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static struct omap_nand_platform_data nand_data = {
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.options = NAND_SAMSUNG_LP_OPTIONS,
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};
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static struct resource nand_resource = {
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.start = OMAP_CS3_PHYS,
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.end = OMAP_CS3_PHYS + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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};
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static struct platform_device nand_device = {
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.name = "omapnand",
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.id = 0,
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.dev = {
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.platform_data = &nand_data,
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},
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.num_resources = 1,
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.resource = &nand_resource,
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static struct resource kp_resources[] = {
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[0] = {
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.start = INT_730_MPUIO_KEYPAD,
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.end = INT_730_MPUIO_KEYPAD,
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct omap_kp_platform_data kp_data = {
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.rows = 8,
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.cols = 8,
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.keymap = fsample_keymap,
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.keymapsize = ARRAY_SIZE(fsample_keymap),
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.delay = 4,
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};
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static struct platform_device kp_device = {
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.name = "omap-keypad",
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.id = -1,
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.dev = {
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.platform_data = &kp_data,
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},
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.num_resources = ARRAY_SIZE(kp_resources),
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.resource = kp_resources,
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};
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static struct platform_device lcd_device = {
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.name = "lcd_p2",
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.id = -1,
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};
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static struct platform_device *devices[] __initdata = {
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&nor_device,
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&nand_device,
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&smc91x_device,
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&kp_device,
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&lcd_device,
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};
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#define P2_NAND_RB_GPIO_PIN 62
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static int nand_dev_ready(struct omap_nand_platform_data *data)
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{
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return gpio_get_value(P2_NAND_RB_GPIO_PIN);
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}
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static struct omap_lcd_config fsample_lcd_config __initdata = {
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.ctrl_name = "internal",
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};
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static struct omap_board_config_kernel fsample_config[] = {
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{ OMAP_TAG_LCD, &fsample_lcd_config },
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};
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static void __init omap_fsample_init(void)
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{
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if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
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BUG();
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nand_data.dev_ready = nand_dev_ready;
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omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
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omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
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platform_add_devices(devices, ARRAY_SIZE(devices));
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omap_board_config = fsample_config;
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omap_board_config_size = ARRAY_SIZE(fsample_config);
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omap_serial_init();
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omap_register_i2c_bus(1, 100, NULL, 0);
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}
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static void __init fsample_init_smc91x(void)
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{
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fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
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H2P2_DBG_FPGA_LAN_RESET);
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mdelay(50);
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}
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static void __init omap_fsample_init_irq(void)
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{
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omap1_init_common_hw();
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omap_init_irq();
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omap_gpio_init();
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fsample_init_smc91x();
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}
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/* Only FPGA needs to be mapped here. All others are done with ioremap */
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static struct map_desc omap_fsample_io_desc[] __initdata = {
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{
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.virtual = H2P2_DBG_FPGA_BASE,
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.pfn = __phys_to_pfn(H2P2_DBG_FPGA_START),
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.length = H2P2_DBG_FPGA_SIZE,
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.type = MT_DEVICE
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},
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{
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.virtual = FSAMPLE_CPLD_BASE,
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.pfn = __phys_to_pfn(FSAMPLE_CPLD_START),
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.length = FSAMPLE_CPLD_SIZE,
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.type = MT_DEVICE
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}
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};
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static void __init omap_fsample_map_io(void)
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{
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omap1_map_common_io();
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iotable_init(omap_fsample_io_desc,
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ARRAY_SIZE(omap_fsample_io_desc));
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/* Early, board-dependent init */
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/*
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* Hold GSM Reset until needed
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*/
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omap_writew(omap_readw(OMAP730_DSP_M_CTL) & ~1, OMAP730_DSP_M_CTL);
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/*
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* UARTs -> done automagically by 8250 driver
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*/
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/*
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* CSx timings, GPIO Mux ... setup
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*/
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/* Flash: CS0 timings setup */
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omap_writel(0x0000fff3, OMAP730_FLASH_CFG_0);
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omap_writel(0x00000088, OMAP730_FLASH_ACFG_0);
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/*
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* Ethernet support through the debug board
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* CS1 timings setup
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*/
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omap_writel(0x0000fff3, OMAP730_FLASH_CFG_1);
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omap_writel(0x00000000, OMAP730_FLASH_ACFG_1);
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/*
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* Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
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* It is used as the Ethernet controller interrupt
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*/
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omap_writel(omap_readl(OMAP730_IO_CONF_9) & 0x1FFFFFFF, OMAP730_IO_CONF_9);
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}
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MACHINE_START(OMAP_FSAMPLE, "OMAP730 F-Sample")
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/* Maintainer: Brian Swetland <swetland@google.com> */
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.phys_io = 0xfff00000,
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.io_pg_offst = ((0xfef00000) >> 18) & 0xfffc,
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.boot_params = 0x10000100,
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.map_io = omap_fsample_map_io,
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.init_irq = omap_fsample_init_irq,
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.init_machine = omap_fsample_init,
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.timer = &omap_timer,
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MACHINE_END
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