f80dff9da0
get_irqnr_preamble allows machines to take some action before entering the get_irqnr_and_base loop. On iop we enable cp6 access. arch_ret_to_user is added to the userspace return path to allow individual architectures to take actions, like disabling coprocessor access, before the final return to userspace. Per Nicolas Pitre's note, there is no need to cp_wait on the return to user as the latency to return is sufficient. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
45 lines
1.5 KiB
ArmAsm
45 lines
1.5 KiB
ArmAsm
/*
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* iop13xx low level irq macros
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* Copyright (c) 2005-2006, Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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*
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*/
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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mrc p15, 0, \tmp, c15, c1, 0
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orr \tmp, \tmp, #(1 << 6)
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mcr p15, 0, \tmp, c15, c1, 0 @ Enable cp6 access
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.endm
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/*
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* Note: a 1-cycle window exists where iintvec will return the value
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* of iintbase, so we explicitly check for "bad zeros"
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*/
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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mrc p6, 0, \irqnr, c3, c2, 0 @ Read IINTVEC
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cmp \irqnr, #0
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mrceq p6, 0, \irqnr, c3, c2, 0 @ Re-read on potentially bad zero
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adds \irqstat, \irqnr, #1 @ Check for 0xffffffff
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movne \irqnr, \irqnr, lsr #2 @ Convert to irqnr
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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mrc p15, 0, \tmp1, c15, c1, 0
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ands \tmp2, \tmp1, #(1 << 6)
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bicne \tmp1, \tmp1, #(1 << 6)
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mcrne p15, 0, \tmp1, c15, c1, 0 @ Disable cp6 access
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.endm
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