d670ac019f
Function declaration differs between file: dma.c and file:dma.h and SPARSE (Documentation/sparse.txt) gives error messages All dma channels are members of 'enum dma_ch' and not 'unsigned int' Please have a look at channel definitions in: arch/arm/mach-s3c64xx/include/mach/dma.h arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h arch/arm/mach-s3c2410/include/mach/dma.h So all arguments should be of type 'enum dma_ch' Signed-off-by: Sangwook Lee <sangwook.lee@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
128 lines
2.9 KiB
C
128 lines
2.9 KiB
C
/* arch/arm/plat-samsung/include/plat/dma.h
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*
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* Copyright (C) 2003-2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* Samsung S3C DMA support
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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enum s3c2410_dma_buffresult {
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S3C2410_RES_OK,
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S3C2410_RES_ERR,
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S3C2410_RES_ABORT
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};
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enum s3c2410_dmasrc {
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S3C2410_DMASRC_HW, /* source is memory */
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S3C2410_DMASRC_MEM /* source is hardware */
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};
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/* enum s3c2410_chan_op
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*
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* operation codes passed to the DMA code by the user, and also used
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* to inform the current channel owner of any changes to the system state
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*/
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enum s3c2410_chan_op {
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S3C2410_DMAOP_START,
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S3C2410_DMAOP_STOP,
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S3C2410_DMAOP_PAUSE,
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S3C2410_DMAOP_RESUME,
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S3C2410_DMAOP_FLUSH,
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S3C2410_DMAOP_TIMEOUT, /* internal signal to handler */
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S3C2410_DMAOP_STARTED, /* indicate channel started */
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};
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struct s3c2410_dma_client {
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char *name;
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};
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struct s3c2410_dma_chan;
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enum dma_ch;
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/* s3c2410_dma_cbfn_t
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*
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* buffer callback routine type
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*/
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typedef void (*s3c2410_dma_cbfn_t)(struct s3c2410_dma_chan *,
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void *buf, int size,
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enum s3c2410_dma_buffresult result);
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typedef int (*s3c2410_dma_opfn_t)(struct s3c2410_dma_chan *,
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enum s3c2410_chan_op );
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/* s3c2410_dma_request
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*
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* request a dma channel exclusivley
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*/
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extern int s3c2410_dma_request(enum dma_ch channel,
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struct s3c2410_dma_client *, void *dev);
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/* s3c2410_dma_ctrl
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*
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* change the state of the dma channel
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*/
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extern int s3c2410_dma_ctrl(enum dma_ch channel, enum s3c2410_chan_op op);
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/* s3c2410_dma_setflags
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*
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* set the channel's flags to a given state
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*/
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extern int s3c2410_dma_setflags(enum dma_ch channel,
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unsigned int flags);
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/* s3c2410_dma_free
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*
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* free the dma channel (will also abort any outstanding operations)
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*/
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extern int s3c2410_dma_free(enum dma_ch channel, struct s3c2410_dma_client *);
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/* s3c2410_dma_enqueue
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*
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* place the given buffer onto the queue of operations for the channel.
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* The buffer must be allocated from dma coherent memory, or the Dcache/WB
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* drained before the buffer is given to the DMA system.
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*/
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extern int s3c2410_dma_enqueue(enum dma_ch channel, void *id,
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dma_addr_t data, int size);
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/* s3c2410_dma_config
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*
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* configure the dma channel
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*/
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extern int s3c2410_dma_config(enum dma_ch channel, int xferunit);
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/* s3c2410_dma_devconfig
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*
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* configure the device we're talking to
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*/
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extern int s3c2410_dma_devconfig(enum dma_ch channel,
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enum s3c2410_dmasrc source, unsigned long devaddr);
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/* s3c2410_dma_getposition
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*
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* get the position that the dma transfer is currently at
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*/
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extern int s3c2410_dma_getposition(enum dma_ch channel,
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dma_addr_t *src, dma_addr_t *dest);
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extern int s3c2410_dma_set_opfn(enum dma_ch, s3c2410_dma_opfn_t rtn);
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extern int s3c2410_dma_set_buffdone_fn(enum dma_ch, s3c2410_dma_cbfn_t rtn);
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