b7d66c88c9
usb0 and usb1 mux settings in the sicrl register were swapped (twice!) in mpc834x_usb_cfg(), leading to various strange issues with fsl-ehci and full speed devices. The USB port config on mpc834x is done using 2 muxes: Port 0 is always used for MPH port 0, and port 1 can either be used for MPH port 1 or DR (unless DR uses UTMI phy or OTG, then it uses both ports) - See 8349 RM figure 1-4.. mpc8349_usb_cfg() had this inverted for the DR, and it also had the bit positions of the usb0 / usb1 mux settings swapped. It would basically work if you specified port1 instead of port0 for the MPH controller (and happened to use ULPI phys), which is what all the 834x dts have done, even though that configuration is physically invalid. Instead fix mpc8349_usb_cfg() and adjust the dts files to match reality. Signed-off-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
68 lines
2.3 KiB
C
68 lines
2.3 KiB
C
#ifndef __MPC83XX_H__
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#define __MPC83XX_H__
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#include <linux/init.h>
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#include <linux/device.h>
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#include <asm/pci-bridge.h>
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/* System Clock Control Register */
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#define MPC83XX_SCCR_OFFS 0xA08
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#define MPC83XX_SCCR_USB_MASK 0x00f00000
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#define MPC83XX_SCCR_USB_MPHCM_11 0x00c00000
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#define MPC83XX_SCCR_USB_MPHCM_01 0x00400000
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#define MPC83XX_SCCR_USB_MPHCM_10 0x00800000
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#define MPC83XX_SCCR_USB_DRCM_11 0x00300000
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#define MPC83XX_SCCR_USB_DRCM_01 0x00100000
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#define MPC83XX_SCCR_USB_DRCM_10 0x00200000
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#define MPC8315_SCCR_USB_MASK 0x00c00000
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#define MPC8315_SCCR_USB_DRCM_11 0x00c00000
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#define MPC8315_SCCR_USB_DRCM_01 0x00400000
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#define MPC837X_SCCR_USB_DRCM_11 0x00c00000
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/* system i/o configuration register low */
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#define MPC83XX_SICRL_OFFS 0x114
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#define MPC834X_SICRL_USB_MASK 0x60000000
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#define MPC834X_SICRL_USB0 0x20000000
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#define MPC834X_SICRL_USB1 0x40000000
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#define MPC831X_SICRL_USB_MASK 0x00000c00
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#define MPC831X_SICRL_USB_ULPI 0x00000800
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#define MPC8315_SICRL_USB_MASK 0x000000fc
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#define MPC8315_SICRL_USB_ULPI 0x00000054
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#define MPC837X_SICRL_USB_MASK 0xf0000000
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#define MPC837X_SICRL_USB_ULPI 0x50000000
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/* system i/o configuration register high */
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#define MPC83XX_SICRH_OFFS 0x118
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#define MPC834X_SICRH_USB_UTMI 0x00020000
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#define MPC831X_SICRH_USB_MASK 0x000000e0
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#define MPC831X_SICRH_USB_ULPI 0x000000a0
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#define MPC8315_SICRH_USB_MASK 0x0000ff00
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#define MPC8315_SICRH_USB_ULPI 0x00000000
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/* USB Control Register */
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#define FSL_USB2_CONTROL_OFFS 0x500
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#define CONTROL_UTMI_PHY_EN 0x00000200
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#define CONTROL_REFSEL_24MHZ 0x00000040
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#define CONTROL_REFSEL_48MHZ 0x00000080
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#define CONTROL_PHY_CLK_SEL_ULPI 0x00000400
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#define CONTROL_OTG_PORT 0x00000020
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/* USB PORTSC Registers */
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#define FSL_USB2_PORTSC1_OFFS 0x184
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#define FSL_USB2_PORTSC2_OFFS 0x188
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#define PORTSCX_PTW_16BIT 0x10000000
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#define PORTSCX_PTS_UTMI 0x00000000
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#define PORTSCX_PTS_ULPI 0x80000000
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/*
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* Declaration for the various functions exported by the
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* mpc83xx_* files. Mostly for use by mpc83xx_setup
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*/
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extern void mpc83xx_restart(char *cmd);
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extern long mpc83xx_time_init(void);
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extern int mpc837x_usb_cfg(void);
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extern int mpc834x_usb_cfg(void);
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extern int mpc831x_usb_cfg(void);
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#endif /* __MPC83XX_H__ */
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