38e760a133
Add missing IRQs and IRQ descriptions to /proc/interrupts. /proc/interrupts is most useful when it displays every IRQ vector in use by the system, not just those somebody thought would be interesting. This patch inserts the following vector displays to the i386 and x86_64 platforms, as appropriate: rescheduling interrupts TLB flush interrupts function call interrupts thermal event interrupts threshold interrupts spurious interrupts A threshold interrupt occurs when ECC memory correction is occuring at too high a frequency. Thresholds are used by the ECC hardware as occasional ECC failures are part of normal operation, but long sequences of ECC failures usually indicate a memory chip that is about to fail. Thermal event interrupts occur when a temperature threshold has been exceeded for some CPU chip. IIRC, a thermal interrupt is also generated when the temperature drops back to a normal level. A spurious interrupt is an interrupt that was raised then lowered by the device before it could be fully processed by the APIC. Hence the apic sees the interrupt but does not know what device it came from. For this case the APIC hardware will assume a vector of 0xff. Rescheduling, call, and TLB flush interrupts are sent from one CPU to another per the needs of the OS. Typically, their statistics would be used to discover if an interrupt flood of the given type has been occuring. AK: merged v2 and v4 which had some more tweaks AK: replace Local interrupts with Local timer interrupts AK: Fixed description of interrupt types. [ tglx: arch/x86 adaptation ] [ mingo: small cleanup ] Signed-off-by: Joe Korty <joe.korty@ccur.com> Signed-off-by: Andi Kleen <ak@suse.de> Cc: Tim Hockin <thockin@hockin.org> Cc: Andi Kleen <ak@suse.de> Cc: Ingo Molnar <mingo@elte.hu> Cc: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
90 lines
2.1 KiB
C
90 lines
2.1 KiB
C
/*
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* Intel specific MCE features.
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* Copyright 2004 Zwane Mwaikambo <zwane@linuxpower.ca>
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/percpu.h>
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#include <asm/processor.h>
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#include <asm/msr.h>
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#include <asm/mce.h>
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#include <asm/hw_irq.h>
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#include <asm/idle.h>
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#include <asm/therm_throt.h>
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asmlinkage void smp_thermal_interrupt(void)
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{
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__u64 msr_val;
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ack_APIC_irq();
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exit_idle();
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irq_enter();
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rdmsrl(MSR_IA32_THERM_STATUS, msr_val);
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if (therm_throt_process(msr_val & 1))
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mce_log_therm_throt_event(smp_processor_id(), msr_val);
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add_pda(irq_thermal_count, 1);
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irq_exit();
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}
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static void __cpuinit intel_init_thermal(struct cpuinfo_x86 *c)
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{
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u32 l, h;
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int tm2 = 0;
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unsigned int cpu = smp_processor_id();
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if (!cpu_has(c, X86_FEATURE_ACPI))
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return;
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if (!cpu_has(c, X86_FEATURE_ACC))
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return;
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/* first check if TM1 is already enabled by the BIOS, in which
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* case there might be some SMM goo which handles it, so we can't even
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* put a handler since it might be delivered via SMI already.
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*/
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rdmsr(MSR_IA32_MISC_ENABLE, l, h);
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h = apic_read(APIC_LVTTHMR);
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if ((l & (1 << 3)) && (h & APIC_DM_SMI)) {
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printk(KERN_DEBUG
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"CPU%d: Thermal monitoring handled by SMI\n", cpu);
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return;
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}
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if (cpu_has(c, X86_FEATURE_TM2) && (l & (1 << 13)))
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tm2 = 1;
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if (h & APIC_VECTOR_MASK) {
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printk(KERN_DEBUG
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"CPU%d: Thermal LVT vector (%#x) already "
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"installed\n", cpu, (h & APIC_VECTOR_MASK));
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return;
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}
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h = THERMAL_APIC_VECTOR;
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h |= (APIC_DM_FIXED | APIC_LVT_MASKED);
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apic_write(APIC_LVTTHMR, h);
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rdmsr(MSR_IA32_THERM_INTERRUPT, l, h);
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wrmsr(MSR_IA32_THERM_INTERRUPT, l | 0x03, h);
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rdmsr(MSR_IA32_MISC_ENABLE, l, h);
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wrmsr(MSR_IA32_MISC_ENABLE, l | (1 << 3), h);
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l = apic_read(APIC_LVTTHMR);
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apic_write(APIC_LVTTHMR, l & ~APIC_LVT_MASKED);
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printk(KERN_INFO "CPU%d: Thermal monitoring enabled (%s)\n",
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cpu, tm2 ? "TM2" : "TM1");
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/* enable thermal throttle processing */
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atomic_set(&therm_throt_en, 1);
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return;
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}
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void __cpuinit mce_intel_feature_init(struct cpuinfo_x86 *c)
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{
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intel_init_thermal(c);
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}
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