4e6d488af3
Otherwise more complicated uart configuration won't be possible. We can use r1 for tmp register for both head.S and debug.S. NOTE: This patch depends on another patch to add the the tmp register into all debug-macro.S files. That can be done with: $ sed -i -e "s/addruart,rx|addruart, rx/addruart, rx, tmp/" arch/arm/*/include/*/debug-macro.S Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
58 lines
1.4 KiB
ArmAsm
58 lines
1.4 KiB
ArmAsm
/* arch/arm/mach-sa1100/include/mach/debug-macro.S
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*
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* Debugging macro include header
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*
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* Copyright (C) 1994-1999 Russell King
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* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <mach/hardware.h>
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.macro addruart, rx, tmp
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mrc p15, 0, \rx, c1, c0
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tst \rx, #1 @ MMU enabled?
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moveq \rx, #0x80000000 @ physical base address
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movne \rx, #0xf8000000 @ virtual address
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@ We probe for the active serial port here, coherently with
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@ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h.
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@ We assume r1 can be clobbered.
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@ see if Ser3 is active
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add \rx, \rx, #0x00050000
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ldr r1, [\rx, #UTCR3]
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tst r1, #UTCR3_TXE
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@ if Ser3 is inactive, then try Ser1
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addeq \rx, \rx, #(0x00010000 - 0x00050000)
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ldreq r1, [\rx, #UTCR3]
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tsteq r1, #UTCR3_TXE
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@ if Ser1 is inactive, then try Ser2
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addeq \rx, \rx, #(0x00030000 - 0x00010000)
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ldreq r1, [\rx, #UTCR3]
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tsteq r1, #UTCR3_TXE
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@ if all ports are inactive, then there is nothing we can do
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moveq pc, lr
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.endm
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.macro senduart,rd,rx
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str \rd, [\rx, #UTDR]
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.endm
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.macro waituart,rd,rx
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1001: ldr \rd, [\rx, #UTSR1]
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tst \rd, #UTSR1_TNF
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beq 1001b
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.endm
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.macro busyuart,rd,rx
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1001: ldr \rd, [\rx, #UTSR1]
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tst \rd, #UTSR1_TBY
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bne 1001b
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.endm
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