1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
981 lines
20 KiB
C
981 lines
20 KiB
C
/* Board specific functions for those embedded 8xx boards that do
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* not have boot monitor support for board information.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/types.h>
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#include <linux/config.h>
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#include <linux/string.h>
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#include <asm/reg.h>
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#ifdef CONFIG_8xx
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#include <asm/mpc8xx.h>
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#endif
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#ifdef CONFIG_8260
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#include <asm/mpc8260.h>
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#include <asm/immap_cpm2.h>
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#endif
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#ifdef CONFIG_40x
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#include <asm/io.h>
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#endif
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extern unsigned long timebase_period_ns;
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/* For those boards that don't provide one.
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*/
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#if !defined(CONFIG_MBX)
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static bd_t bdinfo;
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#endif
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/* IIC functions.
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* These are just the basic master read/write operations so we can
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* examine serial EEPROM.
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*/
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extern void iic_read(uint devaddr, u_char *buf, uint offset, uint count);
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/* Supply a default Ethernet address for those eval boards that don't
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* ship with one. This is an address from the MBX board I have, so
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* it is unlikely you will find it on your network.
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*/
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static ushort def_enet_addr[] = { 0x0800, 0x3e26, 0x1559 };
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#if defined(CONFIG_MBX)
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/* The MBX hands us a pretty much ready to go board descriptor. This
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* is where the idea started in the first place.
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*/
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void
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embed_config(bd_t **bdp)
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{
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u_char *mp;
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u_char eebuf[128];
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int i = 8;
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bd_t *bd;
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bd = *bdp;
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/* Read the first 128 bytes of the EEPROM. There is more,
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* but this is all we need.
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*/
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iic_read(0xa4, eebuf, 0, 128);
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/* All we are looking for is the Ethernet MAC address. The
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* first 8 bytes are 'MOTOROLA', so check for part of that.
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* Next, the VPD describes a MAC 'packet' as being of type 08
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* and size 06. So we look for that and the MAC must follow.
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* If there are more than one, we still only care about the first.
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* If it's there, assume we have a valid MAC address. If not,
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* grab our default one.
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*/
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if ((*(uint *)eebuf) == 0x4d4f544f) {
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while (i < 127 && !(eebuf[i] == 0x08 && eebuf[i + 1] == 0x06))
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i += eebuf[i + 1] + 2; /* skip this packet */
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if (i == 127) /* Couldn't find. */
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mp = (u_char *)def_enet_addr;
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else
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mp = &eebuf[i + 2];
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}
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else
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mp = (u_char *)def_enet_addr;
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for (i=0; i<6; i++)
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bd->bi_enetaddr[i] = *mp++;
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/* The boot rom passes these to us in MHz. Linux now expects
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* them to be in Hz.
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*/
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bd->bi_intfreq *= 1000000;
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bd->bi_busfreq *= 1000000;
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/* Stuff a baud rate here as well.
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*/
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bd->bi_baudrate = 9600;
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}
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#endif /* CONFIG_MBX */
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#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || \
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defined(CONFIG_RPX8260) || defined(CONFIG_EP405)
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/* Helper functions for Embedded Planet boards.
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*/
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/* Because I didn't find anything that would do this.......
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*/
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u_char
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aschex_to_byte(u_char *cp)
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{
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u_char byte, c;
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c = *cp++;
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if ((c >= 'A') && (c <= 'F')) {
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c -= 'A';
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c += 10;
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} else if ((c >= 'a') && (c <= 'f')) {
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c -= 'a';
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c += 10;
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} else
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c -= '0';
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byte = c * 16;
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c = *cp;
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if ((c >= 'A') && (c <= 'F')) {
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c -= 'A';
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c += 10;
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} else if ((c >= 'a') && (c <= 'f')) {
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c -= 'a';
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c += 10;
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} else
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c -= '0';
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byte += c;
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return(byte);
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}
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static void
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rpx_eth(bd_t *bd, u_char *cp)
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{
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int i;
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for (i=0; i<6; i++) {
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bd->bi_enetaddr[i] = aschex_to_byte(cp);
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cp += 2;
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}
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}
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#ifdef CONFIG_RPX8260
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static uint
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rpx_baseten(u_char *cp)
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{
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uint retval;
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retval = 0;
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while (*cp != '\n') {
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retval *= 10;
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retval += (*cp) - '0';
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cp++;
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}
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return(retval);
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}
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#endif
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#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
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static void
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rpx_brate(bd_t *bd, u_char *cp)
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{
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uint rate;
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rate = 0;
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while (*cp != '\n') {
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rate *= 10;
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rate += (*cp) - '0';
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cp++;
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}
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bd->bi_baudrate = rate * 100;
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}
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static void
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rpx_cpuspeed(bd_t *bd, u_char *cp)
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{
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uint num, den;
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num = den = 0;
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while (*cp != '\n') {
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num *= 10;
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num += (*cp) - '0';
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cp++;
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if (*cp == '/') {
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cp++;
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den = (*cp) - '0';
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break;
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}
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}
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/* I don't know why the RPX just can't state the actual
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* CPU speed.....
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*/
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if (den) {
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num /= den;
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num *= den;
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}
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bd->bi_intfreq = bd->bi_busfreq = num * 1000000;
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/* The 8xx can only run a maximum 50 MHz bus speed (until
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* Motorola changes this :-). Greater than 50 MHz parts
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* run internal/2 for bus speed.
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*/
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if (num > 50)
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bd->bi_busfreq /= 2;
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}
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#endif
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#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC) || defined(CONFIG_EP405)
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static void
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rpx_memsize(bd_t *bd, u_char *cp)
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{
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uint size;
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size = 0;
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while (*cp != '\n') {
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size *= 10;
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size += (*cp) - '0';
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cp++;
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}
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bd->bi_memsize = size * 1024 * 1024;
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}
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#endif /* LITE || CLASSIC || EP405 */
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#if defined(CONFIG_EP405)
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static void
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rpx_nvramsize(bd_t *bd, u_char *cp)
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{
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uint size;
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size = 0;
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while (*cp != '\n') {
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size *= 10;
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size += (*cp) - '0';
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cp++;
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}
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bd->bi_nvramsize = size * 1024;
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}
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#endif /* CONFIG_EP405 */
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#endif /* Embedded Planet boards */
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#if defined(CONFIG_RPXLITE) || defined(CONFIG_RPXCLASSIC)
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/* Read the EEPROM on the RPX-Lite board.
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*/
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void
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embed_config(bd_t **bdp)
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{
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u_char eebuf[256], *cp;
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bd_t *bd;
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/* Read the first 256 bytes of the EEPROM. I think this
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* is really all there is, and I hope if it gets bigger the
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* info we want is still up front.
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*/
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bd = &bdinfo;
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*bdp = bd;
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#if 1
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iic_read(0xa8, eebuf, 0, 128);
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iic_read(0xa8, &eebuf[128], 128, 128);
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/* We look for two things, the Ethernet address and the
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* serial baud rate. The records are separated by
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* newlines.
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*/
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cp = eebuf;
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for (;;) {
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if (*cp == 'E') {
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cp++;
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if (*cp == 'A') {
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cp += 2;
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rpx_eth(bd, cp);
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}
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}
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if (*cp == 'S') {
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cp++;
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if (*cp == 'B') {
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cp += 2;
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rpx_brate(bd, cp);
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}
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}
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if (*cp == 'D') {
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cp++;
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if (*cp == '1') {
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cp += 2;
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rpx_memsize(bd, cp);
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}
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}
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if (*cp == 'H') {
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cp++;
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if (*cp == 'Z') {
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cp += 2;
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rpx_cpuspeed(bd, cp);
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}
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}
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/* Scan to the end of the record.
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*/
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while ((*cp != '\n') && (*cp != 0xff))
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cp++;
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/* If the next character is a 0 or ff, we are done.
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*/
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cp++;
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if ((*cp == 0) || (*cp == 0xff))
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break;
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}
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bd->bi_memstart = 0;
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#else
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/* For boards without initialized EEPROM.
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*/
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bd->bi_memstart = 0;
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bd->bi_memsize = (8 * 1024 * 1024);
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bd->bi_intfreq = 48000000;
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bd->bi_busfreq = 48000000;
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bd->bi_baudrate = 9600;
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#endif
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}
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#endif /* RPXLITE || RPXCLASSIC */
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#ifdef CONFIG_BSEIP
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/* Build a board information structure for the BSE ip-Engine.
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* There is more to come since we will add some environment
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* variables and a function to read them.
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*/
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void
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embed_config(bd_t **bdp)
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{
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u_char *cp;
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int i;
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bd_t *bd;
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bd = &bdinfo;
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*bdp = bd;
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/* Baud rate and processor speed will eventually come
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* from the environment variables.
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*/
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bd->bi_baudrate = 9600;
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/* Get the Ethernet station address from the Flash ROM.
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*/
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cp = (u_char *)0xfe003ffa;
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for (i=0; i<6; i++) {
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bd->bi_enetaddr[i] = *cp++;
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}
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/* The rest of this should come from the environment as well.
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*/
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bd->bi_memstart = 0;
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bd->bi_memsize = (16 * 1024 * 1024);
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bd->bi_intfreq = 48000000;
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bd->bi_busfreq = 48000000;
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}
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#endif /* BSEIP */
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#ifdef CONFIG_FADS
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/* Build a board information structure for the FADS.
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*/
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void
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embed_config(bd_t **bdp)
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{
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u_char *cp;
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int i;
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bd_t *bd;
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bd = &bdinfo;
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*bdp = bd;
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/* Just fill in some known values.
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*/
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bd->bi_baudrate = 9600;
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/* Use default enet.
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*/
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cp = (u_char *)def_enet_addr;
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for (i=0; i<6; i++) {
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bd->bi_enetaddr[i] = *cp++;
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}
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bd->bi_memstart = 0;
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bd->bi_memsize = (8 * 1024 * 1024);
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bd->bi_intfreq = 40000000;
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bd->bi_busfreq = 40000000;
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}
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#endif /* FADS */
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#ifdef CONFIG_8260
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/* Compute 8260 clock values if the rom doesn't provide them.
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*/
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static unsigned char bus2core_8260[] = {
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2,
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6, 5, 13, 2, 14, 4, 15, 2, 3, 11, 8, 10, 16, 12, 7, 2,
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};
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static void
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clk_8260(bd_t *bd)
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{
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uint scmr, vco_out, clkin;
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uint plldf, pllmf, corecnf;
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volatile cpm2_map_t *ip;
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ip = (cpm2_map_t *)CPM_MAP_ADDR;
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scmr = ip->im_clkrst.car_scmr;
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/* The clkin is always bus frequency.
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*/
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clkin = bd->bi_busfreq;
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/* Collect the bits from the scmr.
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*/
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plldf = (scmr >> 12) & 1;
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pllmf = scmr & 0xfff;
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corecnf = (scmr >> 24) &0x1f;
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/* This is arithmetic from the 8260 manual.
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*/
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vco_out = clkin / (plldf + 1);
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vco_out *= 2 * (pllmf + 1);
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bd->bi_vco = vco_out; /* Save for later */
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bd->bi_cpmfreq = vco_out / 2; /* CPM Freq, in MHz */
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bd->bi_intfreq = bd->bi_busfreq * bus2core_8260[corecnf] / 2;
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/* Set Baud rate divisor. The power up default is divide by 16,
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* but we set it again here in case it was changed.
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*/
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ip->im_clkrst.car_sccr = 1; /* DIV 16 BRG */
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bd->bi_brgfreq = vco_out / 16;
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}
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static unsigned char bus2core_8280[] = {
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/* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
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3, 2, 2, 2, 4, 4, 5, 9, 6, 11, 8, 10, 3, 12, 7, 2,
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6, 5, 13, 2, 14, 2, 15, 2, 3, 2, 2, 2, 16, 2, 2, 2,
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};
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static void
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clk_8280(bd_t *bd)
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{
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uint scmr, main_clk, clkin;
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uint pllmf, corecnf;
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volatile cpm2_map_t *ip;
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ip = (cpm2_map_t *)CPM_MAP_ADDR;
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scmr = ip->im_clkrst.car_scmr;
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/* The clkin is always bus frequency.
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*/
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clkin = bd->bi_busfreq;
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/* Collect the bits from the scmr.
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*/
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pllmf = scmr & 0xf;
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corecnf = (scmr >> 24) & 0x1f;
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/* This is arithmetic from the 8280 manual.
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*/
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main_clk = clkin * (pllmf + 1);
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bd->bi_cpmfreq = main_clk / 2; /* CPM Freq, in MHz */
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bd->bi_intfreq = bd->bi_busfreq * bus2core_8280[corecnf] / 2;
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/* Set Baud rate divisor. The power up default is divide by 16,
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* but we set it again here in case it was changed.
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*/
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ip->im_clkrst.car_sccr = (ip->im_clkrst.car_sccr & 0x3) | 0x1;
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bd->bi_brgfreq = main_clk / 16;
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}
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#endif
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|
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#ifdef CONFIG_SBC82xx
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void
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embed_config(bd_t **bdp)
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{
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u_char *cp;
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int i;
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bd_t *bd;
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unsigned long pvr;
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bd = *bdp;
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bd = &bdinfo;
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*bdp = bd;
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bd->bi_baudrate = 9600;
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bd->bi_memsize = 256 * 1024 * 1024; /* just a guess */
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cp = (void*)SBC82xx_MACADDR_NVRAM_SCC1;
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memcpy(bd->bi_enetaddr, cp, 6);
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|
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/* can busfreq be calculated? */
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pvr = mfspr(SPRN_PVR);
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if ((pvr & 0xffff0000) == 0x80820000) {
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bd->bi_busfreq = 100000000;
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clk_8280(bd);
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} else {
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bd->bi_busfreq = 66000000;
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clk_8260(bd);
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}
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|
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}
|
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#endif /* SBC82xx */
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|
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#if defined(CONFIG_EST8260) || defined(CONFIG_TQM8260)
|
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void
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embed_config(bd_t **bdp)
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{
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u_char *cp;
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int i;
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bd_t *bd;
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bd = *bdp;
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#if 0
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/* This is actually provided by my boot rom. I have it
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* here for those people that may load the kernel with
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* a JTAG/COP tool and not the rom monitor.
|
|
*/
|
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bd->bi_baudrate = 115200;
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bd->bi_intfreq = 200000000;
|
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bd->bi_busfreq = 66666666;
|
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bd->bi_cpmfreq = 66666666;
|
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bd->bi_brgfreq = 33333333;
|
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bd->bi_memsize = 16 * 1024 * 1024;
|
|
#else
|
|
/* The boot rom passes these to us in MHz. Linux now expects
|
|
* them to be in Hz.
|
|
*/
|
|
bd->bi_intfreq *= 1000000;
|
|
bd->bi_busfreq *= 1000000;
|
|
bd->bi_cpmfreq *= 1000000;
|
|
bd->bi_brgfreq *= 1000000;
|
|
#endif
|
|
|
|
cp = (u_char *)def_enet_addr;
|
|
for (i=0; i<6; i++) {
|
|
bd->bi_enetaddr[i] = *cp++;
|
|
}
|
|
}
|
|
#endif /* EST8260 */
|
|
|
|
#ifdef CONFIG_SBS8260
|
|
void
|
|
embed_config(bd_t **bdp)
|
|
{
|
|
u_char *cp;
|
|
int i;
|
|
bd_t *bd;
|
|
|
|
/* This should provided by the boot rom.
|
|
*/
|
|
bd = &bdinfo;
|
|
*bdp = bd;
|
|
bd->bi_baudrate = 9600;
|
|
bd->bi_memsize = 64 * 1024 * 1024;
|
|
|
|
/* Set all of the clocks. We have to know the speed of the
|
|
* external clock. The development board had 66 MHz.
|
|
*/
|
|
bd->bi_busfreq = 66666666;
|
|
clk_8260(bd);
|
|
|
|
/* I don't know how to compute this yet.
|
|
*/
|
|
bd->bi_intfreq = 133000000;
|
|
|
|
|
|
cp = (u_char *)def_enet_addr;
|
|
for (i=0; i<6; i++) {
|
|
bd->bi_enetaddr[i] = *cp++;
|
|
}
|
|
}
|
|
#endif /* SBS8260 */
|
|
|
|
#ifdef CONFIG_RPX8260
|
|
void
|
|
embed_config(bd_t **bdp)
|
|
{
|
|
u_char *cp, *keyvals;
|
|
int i;
|
|
bd_t *bd;
|
|
|
|
keyvals = (u_char *)*bdp;
|
|
|
|
bd = &bdinfo;
|
|
*bdp = bd;
|
|
|
|
/* This is almost identical to the RPX-Lite/Classic functions
|
|
* on the 8xx boards. It would be nice to have a key lookup
|
|
* function in a string, but the format of all of the fields
|
|
* is slightly different.
|
|
*/
|
|
cp = keyvals;
|
|
for (;;) {
|
|
if (*cp == 'E') {
|
|
cp++;
|
|
if (*cp == 'A') {
|
|
cp += 2;
|
|
rpx_eth(bd, cp);
|
|
}
|
|
}
|
|
if (*cp == 'S') {
|
|
cp++;
|
|
if (*cp == 'B') {
|
|
cp += 2;
|
|
bd->bi_baudrate = rpx_baseten(cp);
|
|
}
|
|
}
|
|
if (*cp == 'D') {
|
|
cp++;
|
|
if (*cp == '1') {
|
|
cp += 2;
|
|
bd->bi_memsize = rpx_baseten(cp) * 1024 * 1024;
|
|
}
|
|
}
|
|
if (*cp == 'X') {
|
|
cp++;
|
|
if (*cp == 'T') {
|
|
cp += 2;
|
|
bd->bi_busfreq = rpx_baseten(cp);
|
|
}
|
|
}
|
|
if (*cp == 'N') {
|
|
cp++;
|
|
if (*cp == 'V') {
|
|
cp += 2;
|
|
bd->bi_nvsize = rpx_baseten(cp) * 1024 * 1024;
|
|
}
|
|
}
|
|
|
|
/* Scan to the end of the record.
|
|
*/
|
|
while ((*cp != '\n') && (*cp != 0xff))
|
|
cp++;
|
|
|
|
/* If the next character is a 0 or ff, we are done.
|
|
*/
|
|
cp++;
|
|
if ((*cp == 0) || (*cp == 0xff))
|
|
break;
|
|
}
|
|
bd->bi_memstart = 0;
|
|
|
|
/* The memory size includes both the 60x and local bus DRAM.
|
|
* I don't want to use the local bus DRAM for real memory,
|
|
* so subtract it out. It would be nice if they were separate
|
|
* keys.
|
|
*/
|
|
bd->bi_memsize -= 32 * 1024 * 1024;
|
|
|
|
/* Set all of the clocks. We have to know the speed of the
|
|
* external clock.
|
|
*/
|
|
clk_8260(bd);
|
|
|
|
/* I don't know how to compute this yet.
|
|
*/
|
|
bd->bi_intfreq = 200000000;
|
|
}
|
|
#endif /* RPX6 for testing */
|
|
|
|
#ifdef CONFIG_ADS8260
|
|
void
|
|
embed_config(bd_t **bdp)
|
|
{
|
|
u_char *cp;
|
|
int i;
|
|
bd_t *bd;
|
|
|
|
/* This should provided by the boot rom.
|
|
*/
|
|
bd = &bdinfo;
|
|
*bdp = bd;
|
|
bd->bi_baudrate = 9600;
|
|
bd->bi_memsize = 16 * 1024 * 1024;
|
|
|
|
/* Set all of the clocks. We have to know the speed of the
|
|
* external clock. The development board had 66 MHz.
|
|
*/
|
|
bd->bi_busfreq = 66666666;
|
|
clk_8260(bd);
|
|
|
|
/* I don't know how to compute this yet.
|
|
*/
|
|
bd->bi_intfreq = 200000000;
|
|
|
|
|
|
cp = (u_char *)def_enet_addr;
|
|
for (i=0; i<6; i++) {
|
|
bd->bi_enetaddr[i] = *cp++;
|
|
}
|
|
}
|
|
#endif /* ADS8260 */
|
|
|
|
#ifdef CONFIG_WILLOW
|
|
void
|
|
embed_config(bd_t **bdp)
|
|
{
|
|
u_char *cp;
|
|
int i;
|
|
bd_t *bd;
|
|
|
|
/* Willow has Open Firmware....I should learn how to get this
|
|
* information from it.
|
|
*/
|
|
bd = &bdinfo;
|
|
*bdp = bd;
|
|
bd->bi_baudrate = 9600;
|
|
bd->bi_memsize = 32 * 1024 * 1024;
|
|
|
|
/* Set all of the clocks. We have to know the speed of the
|
|
* external clock. The development board had 66 MHz.
|
|
*/
|
|
bd->bi_busfreq = 66666666;
|
|
clk_8260(bd);
|
|
|
|
/* I don't know how to compute this yet.
|
|
*/
|
|
bd->bi_intfreq = 200000000;
|
|
|
|
|
|
cp = (u_char *)def_enet_addr;
|
|
for (i=0; i<6; i++) {
|
|
bd->bi_enetaddr[i] = *cp++;
|
|
}
|
|
}
|
|
#endif /* WILLOW */
|
|
|
|
#ifdef CONFIG_XILINX_ML300
|
|
void
|
|
embed_config(bd_t ** bdp)
|
|
{
|
|
static const unsigned long line_size = 32;
|
|
static const unsigned long congruence_classes = 256;
|
|
unsigned long addr;
|
|
unsigned long dccr;
|
|
bd_t *bd;
|
|
|
|
/*
|
|
* Invalidate the data cache if the data cache is turned off.
|
|
* - The 405 core does not invalidate the data cache on power-up
|
|
* or reset but does turn off the data cache. We cannot assume
|
|
* that the cache contents are valid.
|
|
* - If the data cache is turned on this must have been done by
|
|
* a bootloader and we assume that the cache contents are
|
|
* valid.
|
|
*/
|
|
__asm__("mfdccr %0": "=r" (dccr));
|
|
if (dccr == 0) {
|
|
for (addr = 0;
|
|
addr < (congruence_classes * line_size);
|
|
addr += line_size) {
|
|
__asm__("dccci 0,%0": :"b"(addr));
|
|
}
|
|
}
|
|
|
|
bd = &bdinfo;
|
|
*bdp = bd;
|
|
bd->bi_memsize = XPAR_DDR_0_SIZE;
|
|
bd->bi_intfreq = XPAR_CORE_CLOCK_FREQ_HZ;
|
|
bd->bi_busfreq = XPAR_PLB_CLOCK_FREQ_HZ;
|
|
bd->bi_pci_busfreq = XPAR_PCI_0_CLOCK_FREQ_HZ;
|
|
timebase_period_ns = 1000000000 / bd->bi_tbfreq;
|
|
/* see bi_tbfreq definition in arch/ppc/platforms/4xx/xilinx_ml300.h */
|
|
}
|
|
#endif /* CONFIG_XILINX_ML300 */
|
|
|
|
#ifdef CONFIG_IBM_OPENBIOS
|
|
/* This could possibly work for all treeboot roms.
|
|
*/
|
|
#if defined(CONFIG_ASH) || defined(CONFIG_BEECH) || defined(CONFIG_BUBINGA)
|
|
#define BOARD_INFO_VECTOR 0xFFF80B50 /* openbios 1.19 moved this vector down - armin */
|
|
#else
|
|
#define BOARD_INFO_VECTOR 0xFFFE0B50
|
|
#endif
|
|
|
|
#ifdef CONFIG_BEECH
|
|
static void
|
|
get_board_info(bd_t **bdp)
|
|
{
|
|
typedef void (*PFV)(bd_t *bd);
|
|
((PFV)(*(unsigned long *)BOARD_INFO_VECTOR))(*bdp);
|
|
return;
|
|
}
|
|
|
|
void
|
|
embed_config(bd_t **bdp)
|
|
{
|
|
*bdp = &bdinfo;
|
|
get_board_info(bdp);
|
|
}
|
|
#else /* !CONFIG_BEECH */
|
|
void
|
|
embed_config(bd_t **bdp)
|
|
{
|
|
u_char *cp;
|
|
int i;
|
|
bd_t *bd, *treeboot_bd;
|
|
bd_t *(*get_board_info)(void) =
|
|
(bd_t *(*)(void))(*(unsigned long *)BOARD_INFO_VECTOR);
|
|
#if !defined(CONFIG_STB03xxx)
|
|
|
|
/* shut down the Ethernet controller that the boot rom
|
|
* sometimes leaves running.
|
|
*/
|
|
mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
|
|
while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
|
|
out_be32((volatile u32*)EMAC0_BASE,0x20000000); /* then reset EMAC */
|
|
#endif
|
|
|
|
bd = &bdinfo;
|
|
*bdp = bd;
|
|
if ((treeboot_bd = get_board_info()) != NULL) {
|
|
memcpy(bd, treeboot_bd, sizeof(bd_t));
|
|
}
|
|
else {
|
|
/* Hmmm...better try to stuff some defaults.
|
|
*/
|
|
bd->bi_memsize = 16 * 1024 * 1024;
|
|
cp = (u_char *)def_enet_addr;
|
|
for (i=0; i<6; i++) {
|
|
/* I should probably put different ones here,
|
|
* hopefully only one is used.
|
|
*/
|
|
bd->BD_EMAC_ADDR(0,i) = *cp;
|
|
|
|
#ifdef CONFIG_PCI
|
|
bd->bi_pci_enetaddr[i] = *cp++;
|
|
#endif
|
|
}
|
|
bd->bi_tbfreq = 200 * 1000 * 1000;
|
|
bd->bi_intfreq = 200000000;
|
|
bd->bi_busfreq = 100000000;
|
|
#ifdef CONFIG_PCI
|
|
bd->bi_pci_busfreq = 66666666;
|
|
#endif
|
|
}
|
|
/* Yeah, this look weird, but on Redwood 4 they are
|
|
* different object in the structure. Sincr Redwwood 5
|
|
* and Redwood 6 use OpenBIOS, it requires a special value.
|
|
*/
|
|
#if defined(CONFIG_REDWOOD_5) || defined (CONFIG_REDWOOD_6)
|
|
bd->bi_tbfreq = 27 * 1000 * 1000;
|
|
#endif
|
|
timebase_period_ns = 1000000000 / bd->bi_tbfreq;
|
|
}
|
|
#endif /* CONFIG_BEECH */
|
|
#endif /* CONFIG_IBM_OPENBIOS */
|
|
|
|
#ifdef CONFIG_EP405
|
|
#include <linux/serial_reg.h>
|
|
|
|
void
|
|
embed_config(bd_t **bdp)
|
|
{
|
|
u32 chcr0;
|
|
u_char *cp;
|
|
bd_t *bd;
|
|
|
|
/* Different versions of the PlanetCore firmware vary in how
|
|
they set up the serial port - in particular whether they
|
|
use the internal or external serial clock for UART0. Make
|
|
sure the UART is in a known state. */
|
|
/* FIXME: We should use the board's 11.0592MHz external serial
|
|
clock - it will be more accurate for serial rates. For
|
|
now, however the baud rates in ep405.h are for the internal
|
|
clock. */
|
|
chcr0 = mfdcr(DCRN_CHCR0);
|
|
if ( (chcr0 & 0x1fff) != 0x103e ) {
|
|
mtdcr(DCRN_CHCR0, (chcr0 & 0xffffe000) | 0x103e);
|
|
/* The following tricks serial_init() into resetting the baud rate */
|
|
writeb(0, UART0_IO_BASE + UART_LCR);
|
|
}
|
|
|
|
/* We haven't seen actual problems with the EP405 leaving the
|
|
* EMAC running (as we have on Walnut). But the registers
|
|
* suggest it may not be left completely quiescent. Reset it
|
|
* just to be sure. */
|
|
mtdcr(DCRN_MALCR(DCRN_MAL_BASE), MALCR_MMSR); /* 1st reset MAL */
|
|
while (mfdcr(DCRN_MALCR(DCRN_MAL_BASE)) & MALCR_MMSR) {}; /* wait for the reset */
|
|
out_be32((unsigned *)EMAC0_BASE,0x20000000); /* then reset EMAC */
|
|
|
|
bd = &bdinfo;
|
|
*bdp = bd;
|
|
#if 1
|
|
cp = (u_char *)0xF0000EE0;
|
|
for (;;) {
|
|
if (*cp == 'E') {
|
|
cp++;
|
|
if (*cp == 'A') {
|
|
cp += 2;
|
|
rpx_eth(bd, cp);
|
|
}
|
|
}
|
|
|
|
if (*cp == 'D') {
|
|
cp++;
|
|
if (*cp == '1') {
|
|
cp += 2;
|
|
rpx_memsize(bd, cp);
|
|
}
|
|
}
|
|
|
|
if (*cp == 'N') {
|
|
cp++;
|
|
if (*cp == 'V') {
|
|
cp += 2;
|
|
rpx_nvramsize(bd, cp);
|
|
}
|
|
}
|
|
while ((*cp != '\n') && (*cp != 0xff))
|
|
cp++;
|
|
|
|
cp++;
|
|
if ((*cp == 0) || (*cp == 0xff))
|
|
break;
|
|
}
|
|
bd->bi_intfreq = 200000000;
|
|
bd->bi_busfreq = 100000000;
|
|
bd->bi_pci_busfreq= 33000000 ;
|
|
#else
|
|
|
|
bd->bi_memsize = 64000000;
|
|
bd->bi_intfreq = 200000000;
|
|
bd->bi_busfreq = 100000000;
|
|
bd->bi_pci_busfreq= 33000000 ;
|
|
#endif
|
|
}
|
|
#endif
|
|
|
|
#ifdef CONFIG_RAINIER
|
|
/* Rainier uses vxworks bootrom */
|
|
void
|
|
embed_config(bd_t **bdp)
|
|
{
|
|
u_char *cp;
|
|
int i;
|
|
bd_t *bd;
|
|
|
|
bd = &bdinfo;
|
|
*bdp = bd;
|
|
|
|
for(i=0;i<8192;i+=32) {
|
|
__asm__("dccci 0,%0" :: "r" (i));
|
|
}
|
|
__asm__("iccci 0,0");
|
|
__asm__("sync;isync");
|
|
|
|
/* init ram for parity */
|
|
memset(0, 0,0x400000); /* Lo memory */
|
|
|
|
|
|
bd->bi_memsize = (32 * 1024 * 1024) ;
|
|
bd->bi_intfreq = 133000000; //the internal clock is 133 MHz
|
|
bd->bi_busfreq = 100000000;
|
|
bd->bi_pci_busfreq= 33000000;
|
|
|
|
cp = (u_char *)def_enet_addr;
|
|
for (i=0; i<6; i++) {
|
|
bd->bi_enetaddr[i] = *cp++;
|
|
}
|
|
|
|
}
|
|
#endif
|
|
|