kernel-fxtec-pro1x/include/dt-bindings/reset/sun8i-r-ccu.h
Icenowy Zheng cdb8b80b60 clk: sunxi-ng: add support for PRCM CCUs
SoCs after A31 has a clock controller module in the PRCM part.

Support the clock controller module on H3/5 and A64 now.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
2017-04-04 17:43:52 +02:00

53 lines
2.2 KiB
C

/*
* Copyright (C) 2016 Icenowy Zheng <icenowy@aosc.xyz>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
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* The above copyright notice and this permission notice shall be
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*
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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*/
#ifndef _DT_BINDINGS_RST_SUN8I_R_CCU_H_
#define _DT_BINDINGS_RST_SUN8I_R_CCU_H_
#define RST_APB0_IR 0
#define RST_APB0_TIMER 1
#define RST_APB0_RSB 2
#define RST_APB0_UART 3
/* 4 is reserved for RST_APB0_W1 on A31 */
#define RST_APB0_I2C 5
#endif /* _DT_BINDINGS_RST_SUN8I_R_CCU_H_ */