c6e6c96d8f
Add a new style driver for the clock control unit in Allwinner A31/A31s.
A few clocks are still missing:
- MIPI PLL's HDMI mode support
- EMAC clock
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
106 lines
3.5 KiB
C
106 lines
3.5 KiB
C
/*
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* Copyright (C) 2016 Chen-Yu Tsai <wens@csie.org>
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _DT_BINDINGS_RST_SUN6I_A31_H_
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#define _DT_BINDINGS_RST_SUN6I_A31_H_
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#define RST_USB_PHY0 0
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#define RST_USB_PHY1 1
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#define RST_USB_PHY2 2
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#define RST_AHB1_MIPI_DSI 3
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#define RST_AHB1_SS 4
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#define RST_AHB1_DMA 5
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#define RST_AHB1_MMC0 6
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#define RST_AHB1_MMC1 7
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#define RST_AHB1_MMC2 8
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#define RST_AHB1_MMC3 9
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#define RST_AHB1_NAND1 10
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#define RST_AHB1_NAND0 11
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#define RST_AHB1_SDRAM 12
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#define RST_AHB1_EMAC 13
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#define RST_AHB1_TS 14
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#define RST_AHB1_HSTIMER 15
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#define RST_AHB1_SPI0 16
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#define RST_AHB1_SPI1 17
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#define RST_AHB1_SPI2 18
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#define RST_AHB1_SPI3 19
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#define RST_AHB1_OTG 20
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#define RST_AHB1_EHCI0 21
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#define RST_AHB1_EHCI1 22
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#define RST_AHB1_OHCI0 23
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#define RST_AHB1_OHCI1 24
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#define RST_AHB1_OHCI2 25
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#define RST_AHB1_VE 26
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#define RST_AHB1_LCD0 27
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#define RST_AHB1_LCD1 28
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#define RST_AHB1_CSI 29
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#define RST_AHB1_HDMI 30
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#define RST_AHB1_BE0 31
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#define RST_AHB1_BE1 32
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#define RST_AHB1_FE0 33
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#define RST_AHB1_FE1 34
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#define RST_AHB1_MP 35
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#define RST_AHB1_GPU 36
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#define RST_AHB1_DEU0 37
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#define RST_AHB1_DEU1 38
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#define RST_AHB1_DRC0 39
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#define RST_AHB1_DRC1 40
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#define RST_AHB1_LVDS 41
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#define RST_APB1_CODEC 42
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#define RST_APB1_SPDIF 43
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#define RST_APB1_DIGITAL_MIC 44
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#define RST_APB1_DAUDIO0 45
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#define RST_APB1_DAUDIO1 46
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#define RST_APB2_I2C0 47
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#define RST_APB2_I2C1 48
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#define RST_APB2_I2C2 49
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#define RST_APB2_I2C3 50
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#define RST_APB2_UART0 51
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#define RST_APB2_UART1 52
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#define RST_APB2_UART2 53
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#define RST_APB2_UART3 54
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#define RST_APB2_UART4 55
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#define RST_APB2_UART5 56
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#endif /* _DT_BINDINGS_RST_SUN6I_A31_H_ */
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