92c260f755
* rmk/for-linus: (1557 commits) ARM: 6806/1: irq: introduce entry and exit functions for chained handlers ARM: 6781/1: Thumb-2: Work around buggy Thumb-2 short branch relocations in gas ARM: 6747/1: P2V: Thumb2 support ARM: 6798/1: aout-core: zero thread debug registers in a.out core dump ARM: 6796/1: Footbridge: Fix I/O mappings for NOMMU mode ARM: 6784/1: errata: no automatic Store Buffer drain on Cortex-A9 ARM: 6772/1: errata: possible fault MMU translations following an ASID switch ARM: 6776/1: mach-ux500: activate fix for errata 753970 ARM: 6794/1: SPEAr: Append UL to device address macros. ARM: 6793/1: SPEAr: Remove unused *_SIZE macros from spear*.h files ARM: 6792/1: SPEAr: Replace SIZE macro's with SZ_4K macros ARM: 6791/1: SPEAr3xx: Declare device structures after shirq code ARM: 6790/1: SPEAr: Clock Framework: Rename usbd clock and align apb_clk entry ARM: 6789/1: SPEAr3xx: Rename sdio to sdhci ARM: 6788/1: SPEAr: Include mach/hardware.h instead of mach/spear.h ARM: 6787/1: SPEAr: Reorder #includes in .h & .c files. ARM: 6681/1: SPEAr: add debugfs support to clk API ARM: 6703/1: SPEAr: update clk API support ARM: 6679/1: SPEAr: make clk API functions more generic ARM: 6737/1: SPEAr: formalized timer support ... Conflicts: arch/arm/mach-msm/board-msm7x27.c arch/arm/mach-msm/board-msm7x30.c arch/arm/mach-msm/board-qsd8x50.c arch/arm/mach-msm/board-sapphire.c arch/arm/mach-msm/include/mach/memory.h
162 lines
4.1 KiB
C
162 lines
4.1 KiB
C
/*
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* Copyright (C) 2007 Google, Inc.
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* Copyright (c) 2008-2009, Code Aurora Forum. All rights reserved.
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* Author: Brian Swetland <swetland@google.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/input.h>
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#include <linux/io.h>
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#include <linux/delay.h>
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#include <linux/power_supply.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/flash.h>
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#include <asm/setup.h>
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#ifdef CONFIG_CACHE_L2X0
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#include <asm/hardware/cache-l2x0.h>
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#endif
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#include <mach/vreg.h>
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#include <mach/mpp.h>
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#include <mach/gpio.h>
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#include <mach/board.h>
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#include <mach/msm_iomap.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include "devices.h"
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#include "socinfo.h"
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#include "clock.h"
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static struct resource smc91x_resources[] = {
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[0] = {
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.start = 0x9C004300,
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.end = 0x9C0043ff,
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.flags = IORESOURCE_MEM,
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},
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[1] = {
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.start = MSM_GPIO_TO_INT(132),
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.end = MSM_GPIO_TO_INT(132),
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.flags = IORESOURCE_IRQ,
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},
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};
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static struct platform_device smc91x_device = {
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.name = "smc91x",
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.id = 0,
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.num_resources = ARRAY_SIZE(smc91x_resources),
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.resource = smc91x_resources,
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};
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static struct platform_device *devices[] __initdata = {
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&msm_device_uart3,
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&msm_device_smd,
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&msm_device_dmov,
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&msm_device_nand,
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&smc91x_device,
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};
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extern struct sys_timer msm_timer;
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static void __init msm7x2x_init_irq(void)
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{
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msm_init_irq();
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}
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static void __init msm7x2x_init(void)
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{
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if (socinfo_init() < 0)
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BUG();
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if (machine_is_msm7x25_ffa() || machine_is_msm7x27_ffa()) {
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smc91x_resources[0].start = 0x98000300;
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smc91x_resources[0].end = 0x980003ff;
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smc91x_resources[1].start = MSM_GPIO_TO_INT(85);
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smc91x_resources[1].end = MSM_GPIO_TO_INT(85);
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if (gpio_tlmm_config(GPIO_CFG(85, 0,
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GPIO_INPUT,
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GPIO_PULL_DOWN,
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GPIO_2MA),
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GPIO_ENABLE)) {
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printk(KERN_ERR
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"%s: Err: Config GPIO-85 INT\n",
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__func__);
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}
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}
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platform_add_devices(devices, ARRAY_SIZE(devices));
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}
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static void __init msm7x2x_map_io(void)
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{
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msm_map_common_io();
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/* Technically dependent on the SoC but using machine_is
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* macros since socinfo is not available this early and there
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* are plans to restructure the code which will eliminate the
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* need for socinfo.
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*/
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if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa())
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msm_clock_init(msm_clocks_7x27, msm_num_clocks_7x27);
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if (machine_is_msm7x25_surf() || machine_is_msm7x25_ffa())
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msm_clock_init(msm_clocks_7x25, msm_num_clocks_7x25);
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#ifdef CONFIG_CACHE_L2X0
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if (machine_is_msm7x27_surf() || machine_is_msm7x27_ffa()) {
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/* 7x27 has 256KB L2 cache:
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64Kb/Way and 4-Way Associativity;
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R/W latency: 3 cycles;
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evmon/parity/share disabled. */
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l2x0_init(MSM_L2CC_BASE, 0x00068012, 0xfe000000);
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}
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#endif
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}
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MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")
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.boot_params = PLAT_PHYS_OFFSET + 0x100,
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.map_io = msm7x2x_map_io,
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.init_irq = msm7x2x_init_irq,
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.init_machine = msm7x2x_init,
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.timer = &msm_timer,
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MACHINE_END
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MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")
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.boot_params = PLAT_PHYS_OFFSET + 0x100,
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.map_io = msm7x2x_map_io,
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.init_irq = msm7x2x_init_irq,
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.init_machine = msm7x2x_init,
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.timer = &msm_timer,
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MACHINE_END
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MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")
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.boot_params = PLAT_PHYS_OFFSET + 0x100,
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.map_io = msm7x2x_map_io,
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.init_irq = msm7x2x_init_irq,
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.init_machine = msm7x2x_init,
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.timer = &msm_timer,
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MACHINE_END
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MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA")
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.boot_params = PLAT_PHYS_OFFSET + 0x100,
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.map_io = msm7x2x_map_io,
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.init_irq = msm7x2x_init_irq,
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.init_machine = msm7x2x_init,
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.timer = &msm_timer,
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MACHINE_END
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