17049d30c2
This patch adds support to use the priority assignment table in the ieee_ets structure to map priorities to traffic classes. Previously ixgbe only supported a 1:1 mapping. Now we can enable and disable hardware DCB support when multiple traffic classes are actually being used. This allows the default case all priorities mapped to traffic class 0 to work in normal hardware mode and utilize the full packet buffer. This patch does not address putting the hardware in 4TC mode so packet buffer space may be underutilized in this case. A follow up patch can address this optimization. But at least we have the hooks to do this now. Also CEE will behave as it always has and map priorities 1:1 with traffic classes. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> |
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.. | ||
ixgbe.h | ||
ixgbe_82598.c | ||
ixgbe_82599.c | ||
ixgbe_common.c | ||
ixgbe_common.h | ||
ixgbe_dcb.c | ||
ixgbe_dcb.h | ||
ixgbe_dcb_82598.c | ||
ixgbe_dcb_82598.h | ||
ixgbe_dcb_82599.c | ||
ixgbe_dcb_82599.h | ||
ixgbe_dcb_nl.c | ||
ixgbe_ethtool.c | ||
ixgbe_fcoe.c | ||
ixgbe_fcoe.h | ||
ixgbe_main.c | ||
ixgbe_mbx.c | ||
ixgbe_mbx.h | ||
ixgbe_phy.c | ||
ixgbe_phy.h | ||
ixgbe_sriov.c | ||
ixgbe_sriov.h | ||
ixgbe_type.h | ||
ixgbe_x540.c | ||
Makefile |