f7be9abaa5
Move the core S3C64XX support to mach-s3c64xx as it is unlikely to be used outside of this directory. Also move the SoC header files in with it. This includes the clock, cpu, cpufreq, dma, gpiolib and pll support. Signed-off-by: Ben Dooks <ben-linux@fluff.org>
107 lines
2.4 KiB
C
107 lines
2.4 KiB
C
/*
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* linux/arch/arm/mach-s3c64xx/mach-ncp.c
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*
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* Copyright (C) 2008-2009 Samsung Electronics
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/serial_core.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/fb.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <video/platform_lcd.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <mach/hardware.h>
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#include <mach/regs-fb.h>
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#include <mach/map.h>
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#include <asm/irq.h>
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#include <asm/mach-types.h>
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#include <plat/regs-serial.h>
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#include <plat/iic.h>
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#include <plat/fb.h>
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#include <mach/s3c6410.h>
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#include <plat/clock.h>
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#include <plat/devs.h>
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#include <plat/cpu.h>
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#define UCON S3C2410_UCON_DEFAULT
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#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE
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#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
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static struct s3c2410_uartcfg ncp_uartcfgs[] __initdata = {
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/* REVISIT: NCP uses only serial 1, 2 */
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = UCON,
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.ulcon = ULCON,
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.ufcon = UFCON,
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},
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};
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static struct platform_device *ncp_devices[] __initdata = {
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&s3c_device_hsmmc1,
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&s3c_device_i2c0,
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};
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static struct map_desc ncp_iodesc[] __initdata = {};
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static void __init ncp_map_io(void)
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{
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s3c64xx_init_io(ncp_iodesc, ARRAY_SIZE(ncp_iodesc));
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s3c24xx_init_clocks(12000000);
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s3c24xx_init_uarts(ncp_uartcfgs, ARRAY_SIZE(ncp_uartcfgs));
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}
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static void __init ncp_machine_init(void)
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{
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s3c_i2c0_set_platdata(NULL);
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platform_add_devices(ncp_devices, ARRAY_SIZE(ncp_devices));
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}
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MACHINE_START(NCP, "NCP")
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/* Maintainer: Samsung Electronics */
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.phys_io = S3C_PA_UART & 0xfff00000,
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.io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc,
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.boot_params = S3C64XX_PA_SDRAM + 0x100,
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.init_irq = s3c6410_init_irq,
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.map_io = ncp_map_io,
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.init_machine = ncp_machine_init,
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.timer = &s3c24xx_timer,
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MACHINE_END
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