7a921c9362
Currently the q_vectors are being allocated statically inside of the adapter struct. This increases the overall size of the adapter struct when we can easily allocate the vectors dynamically. This patch changes that behavior so that the q_vectors are allocated dynamically and the napi structures are automatically allocated inside of the q_vectors as needed. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
1192 lines
39 KiB
C
1192 lines
39 KiB
C
/*******************************************************************************
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Intel 10 Gigabit PCI Express Linux driver
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Copyright(c) 1999 - 2009 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Contact Information:
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e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
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Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
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*******************************************************************************/
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/* ethtool support for ixgbe */
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#include <linux/types.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/netdevice.h>
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#include <linux/ethtool.h>
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#include <linux/vmalloc.h>
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#include <linux/uaccess.h>
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#include "ixgbe.h"
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#define IXGBE_ALL_RAR_ENTRIES 16
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struct ixgbe_stats {
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char stat_string[ETH_GSTRING_LEN];
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int sizeof_stat;
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int stat_offset;
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};
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#define IXGBE_STAT(m) sizeof(((struct ixgbe_adapter *)0)->m), \
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offsetof(struct ixgbe_adapter, m)
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static struct ixgbe_stats ixgbe_gstrings_stats[] = {
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{"rx_packets", IXGBE_STAT(net_stats.rx_packets)},
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{"tx_packets", IXGBE_STAT(net_stats.tx_packets)},
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{"rx_bytes", IXGBE_STAT(net_stats.rx_bytes)},
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{"tx_bytes", IXGBE_STAT(net_stats.tx_bytes)},
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{"lsc_int", IXGBE_STAT(lsc_int)},
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{"tx_busy", IXGBE_STAT(tx_busy)},
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{"non_eop_descs", IXGBE_STAT(non_eop_descs)},
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{"rx_errors", IXGBE_STAT(net_stats.rx_errors)},
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{"tx_errors", IXGBE_STAT(net_stats.tx_errors)},
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{"rx_dropped", IXGBE_STAT(net_stats.rx_dropped)},
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{"tx_dropped", IXGBE_STAT(net_stats.tx_dropped)},
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{"multicast", IXGBE_STAT(net_stats.multicast)},
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{"broadcast", IXGBE_STAT(stats.bprc)},
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{"rx_no_buffer_count", IXGBE_STAT(stats.rnbc[0]) },
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{"collisions", IXGBE_STAT(net_stats.collisions)},
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{"rx_over_errors", IXGBE_STAT(net_stats.rx_over_errors)},
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{"rx_crc_errors", IXGBE_STAT(net_stats.rx_crc_errors)},
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{"rx_frame_errors", IXGBE_STAT(net_stats.rx_frame_errors)},
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{"hw_rsc_count", IXGBE_STAT(rsc_count)},
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{"rx_fifo_errors", IXGBE_STAT(net_stats.rx_fifo_errors)},
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{"rx_missed_errors", IXGBE_STAT(net_stats.rx_missed_errors)},
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{"tx_aborted_errors", IXGBE_STAT(net_stats.tx_aborted_errors)},
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{"tx_carrier_errors", IXGBE_STAT(net_stats.tx_carrier_errors)},
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{"tx_fifo_errors", IXGBE_STAT(net_stats.tx_fifo_errors)},
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{"tx_heartbeat_errors", IXGBE_STAT(net_stats.tx_heartbeat_errors)},
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{"tx_timeout_count", IXGBE_STAT(tx_timeout_count)},
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{"tx_restart_queue", IXGBE_STAT(restart_queue)},
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{"rx_long_length_errors", IXGBE_STAT(stats.roc)},
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{"rx_short_length_errors", IXGBE_STAT(stats.ruc)},
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{"tx_tcp4_seg_ctxt", IXGBE_STAT(hw_tso_ctxt)},
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{"tx_tcp6_seg_ctxt", IXGBE_STAT(hw_tso6_ctxt)},
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{"tx_flow_control_xon", IXGBE_STAT(stats.lxontxc)},
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{"rx_flow_control_xon", IXGBE_STAT(stats.lxonrxc)},
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{"tx_flow_control_xoff", IXGBE_STAT(stats.lxofftxc)},
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{"rx_flow_control_xoff", IXGBE_STAT(stats.lxoffrxc)},
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{"rx_csum_offload_good", IXGBE_STAT(hw_csum_rx_good)},
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{"rx_csum_offload_errors", IXGBE_STAT(hw_csum_rx_error)},
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{"tx_csum_offload_ctxt", IXGBE_STAT(hw_csum_tx_good)},
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{"rx_header_split", IXGBE_STAT(rx_hdr_split)},
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{"alloc_rx_page_failed", IXGBE_STAT(alloc_rx_page_failed)},
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{"alloc_rx_buff_failed", IXGBE_STAT(alloc_rx_buff_failed)},
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{"rx_no_dma_resources", IXGBE_STAT(hw_rx_no_dma_resources)},
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};
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#define IXGBE_QUEUE_STATS_LEN \
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((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
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((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
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(sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
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#define IXGBE_GLOBAL_STATS_LEN ARRAY_SIZE(ixgbe_gstrings_stats)
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#define IXGBE_PB_STATS_LEN ( \
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(((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
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IXGBE_FLAG_DCB_ENABLED) ? \
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(sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
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sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
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sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
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sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
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/ sizeof(u64) : 0)
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#define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
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IXGBE_PB_STATS_LEN + \
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IXGBE_QUEUE_STATS_LEN)
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static int ixgbe_get_settings(struct net_device *netdev,
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struct ethtool_cmd *ecmd)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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struct ixgbe_hw *hw = &adapter->hw;
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u32 link_speed = 0;
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bool link_up;
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ecmd->supported = SUPPORTED_10000baseT_Full;
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ecmd->autoneg = AUTONEG_ENABLE;
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ecmd->transceiver = XCVR_EXTERNAL;
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if (hw->phy.media_type == ixgbe_media_type_copper) {
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ecmd->supported |= (SUPPORTED_1000baseT_Full |
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SUPPORTED_TP | SUPPORTED_Autoneg);
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ecmd->advertising = (ADVERTISED_TP | ADVERTISED_Autoneg);
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if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_10GB_FULL)
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ecmd->advertising |= ADVERTISED_10000baseT_Full;
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if (hw->phy.autoneg_advertised & IXGBE_LINK_SPEED_1GB_FULL)
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ecmd->advertising |= ADVERTISED_1000baseT_Full;
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/*
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* It's possible that phy.autoneg_advertised may not be
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* set yet. If so display what the default would be -
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* both 1G and 10G supported.
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*/
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if (!(ecmd->advertising & (ADVERTISED_1000baseT_Full |
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ADVERTISED_10000baseT_Full)))
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ecmd->advertising |= (ADVERTISED_10000baseT_Full |
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ADVERTISED_1000baseT_Full);
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ecmd->port = PORT_TP;
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} else if (hw->phy.media_type == ixgbe_media_type_backplane) {
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/* Set as FIBRE until SERDES defined in kernel */
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switch (hw->device_id) {
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case IXGBE_DEV_ID_82598:
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ecmd->supported |= (SUPPORTED_1000baseT_Full |
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SUPPORTED_FIBRE);
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ecmd->advertising = (ADVERTISED_10000baseT_Full |
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ADVERTISED_1000baseT_Full |
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ADVERTISED_FIBRE);
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ecmd->port = PORT_FIBRE;
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break;
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case IXGBE_DEV_ID_82598_BX:
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ecmd->supported = (SUPPORTED_1000baseT_Full |
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SUPPORTED_FIBRE);
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ecmd->advertising = (ADVERTISED_1000baseT_Full |
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ADVERTISED_FIBRE);
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ecmd->port = PORT_FIBRE;
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ecmd->autoneg = AUTONEG_DISABLE;
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break;
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}
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} else {
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ecmd->supported |= SUPPORTED_FIBRE;
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ecmd->advertising = (ADVERTISED_10000baseT_Full |
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ADVERTISED_FIBRE);
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ecmd->port = PORT_FIBRE;
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ecmd->autoneg = AUTONEG_DISABLE;
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}
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hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
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if (link_up) {
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ecmd->speed = (link_speed == IXGBE_LINK_SPEED_10GB_FULL) ?
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SPEED_10000 : SPEED_1000;
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ecmd->duplex = DUPLEX_FULL;
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} else {
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ecmd->speed = -1;
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ecmd->duplex = -1;
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}
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return 0;
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}
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static int ixgbe_set_settings(struct net_device *netdev,
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struct ethtool_cmd *ecmd)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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struct ixgbe_hw *hw = &adapter->hw;
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u32 advertised, old;
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s32 err;
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switch (hw->phy.media_type) {
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case ixgbe_media_type_fiber:
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if ((ecmd->autoneg == AUTONEG_ENABLE) ||
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(ecmd->speed + ecmd->duplex != SPEED_10000 + DUPLEX_FULL))
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return -EINVAL;
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/* in this case we currently only support 10Gb/FULL */
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break;
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case ixgbe_media_type_copper:
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/* 10000/copper and 1000/copper must autoneg
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* this function does not support any duplex forcing, but can
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* limit the advertising of the adapter to only 10000 or 1000 */
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if (ecmd->autoneg == AUTONEG_DISABLE)
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return -EINVAL;
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old = hw->phy.autoneg_advertised;
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advertised = 0;
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if (ecmd->advertising & ADVERTISED_10000baseT_Full)
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advertised |= IXGBE_LINK_SPEED_10GB_FULL;
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if (ecmd->advertising & ADVERTISED_1000baseT_Full)
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advertised |= IXGBE_LINK_SPEED_1GB_FULL;
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if (old == advertised)
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break;
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/* this sets the link speed and restarts auto-neg */
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err = hw->mac.ops.setup_link_speed(hw, advertised, true, true);
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if (err) {
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DPRINTK(PROBE, INFO,
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"setup link failed with code %d\n", err);
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hw->mac.ops.setup_link_speed(hw, old, true, true);
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}
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break;
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default:
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break;
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}
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return 0;
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}
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static void ixgbe_get_pauseparam(struct net_device *netdev,
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struct ethtool_pauseparam *pause)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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struct ixgbe_hw *hw = &adapter->hw;
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/*
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* Flow Control Autoneg isn't on if
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* - we didn't ask for it OR
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* - it failed, we know this by tx & rx being off
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*/
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if (hw->fc.disable_fc_autoneg ||
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(hw->fc.current_mode == ixgbe_fc_none))
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pause->autoneg = 0;
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else
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pause->autoneg = 1;
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if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
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pause->rx_pause = 1;
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} else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
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pause->tx_pause = 1;
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} else if (hw->fc.current_mode == ixgbe_fc_full) {
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pause->rx_pause = 1;
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pause->tx_pause = 1;
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}
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}
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static int ixgbe_set_pauseparam(struct net_device *netdev,
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struct ethtool_pauseparam *pause)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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struct ixgbe_hw *hw = &adapter->hw;
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if (pause->autoneg != AUTONEG_ENABLE)
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hw->fc.disable_fc_autoneg = true;
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else
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hw->fc.disable_fc_autoneg = false;
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if (pause->rx_pause && pause->tx_pause)
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hw->fc.requested_mode = ixgbe_fc_full;
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else if (pause->rx_pause && !pause->tx_pause)
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hw->fc.requested_mode = ixgbe_fc_rx_pause;
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else if (!pause->rx_pause && pause->tx_pause)
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hw->fc.requested_mode = ixgbe_fc_tx_pause;
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else if (!pause->rx_pause && !pause->tx_pause)
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hw->fc.requested_mode = ixgbe_fc_none;
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else
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return -EINVAL;
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hw->mac.ops.setup_fc(hw, 0);
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return 0;
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}
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static u32 ixgbe_get_rx_csum(struct net_device *netdev)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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return (adapter->flags & IXGBE_FLAG_RX_CSUM_ENABLED);
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}
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static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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if (data)
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adapter->flags |= IXGBE_FLAG_RX_CSUM_ENABLED;
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else
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adapter->flags &= ~IXGBE_FLAG_RX_CSUM_ENABLED;
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if (netif_running(netdev))
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ixgbe_reinit_locked(adapter);
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else
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ixgbe_reset(adapter);
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return 0;
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}
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static u32 ixgbe_get_tx_csum(struct net_device *netdev)
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{
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return (netdev->features & NETIF_F_IP_CSUM) != 0;
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}
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static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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if (data) {
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netdev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
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if (adapter->hw.mac.type == ixgbe_mac_82599EB)
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netdev->features |= NETIF_F_SCTP_CSUM;
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} else {
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netdev->features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM);
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if (adapter->hw.mac.type == ixgbe_mac_82599EB)
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netdev->features &= ~NETIF_F_SCTP_CSUM;
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}
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return 0;
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}
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static int ixgbe_set_tso(struct net_device *netdev, u32 data)
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{
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if (data) {
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netdev->features |= NETIF_F_TSO;
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netdev->features |= NETIF_F_TSO6;
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} else {
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netif_tx_stop_all_queues(netdev);
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netdev->features &= ~NETIF_F_TSO;
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netdev->features &= ~NETIF_F_TSO6;
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netif_tx_start_all_queues(netdev);
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}
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return 0;
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}
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static u32 ixgbe_get_msglevel(struct net_device *netdev)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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return adapter->msg_enable;
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}
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static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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adapter->msg_enable = data;
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}
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static int ixgbe_get_regs_len(struct net_device *netdev)
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{
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#define IXGBE_REGS_LEN 1128
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return IXGBE_REGS_LEN * sizeof(u32);
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}
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#define IXGBE_GET_STAT(_A_, _R_) _A_->stats._R_
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static void ixgbe_get_regs(struct net_device *netdev,
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struct ethtool_regs *regs, void *p)
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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struct ixgbe_hw *hw = &adapter->hw;
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u32 *regs_buff = p;
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u8 i;
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memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
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regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
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/* General Registers */
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regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
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regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
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regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
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regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
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regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
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regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
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regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
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regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
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/* NVM Register */
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regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
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regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
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regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
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regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
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regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
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regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
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regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
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regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
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regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
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regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
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/* Interrupt */
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/* don't read EICR because it can clear interrupt causes, instead
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* read EICS which is a shadow but doesn't clear EICR */
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regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
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regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
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regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
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regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
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regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
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regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
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regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
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regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
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|
regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
|
|
regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
|
|
regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
|
|
regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
|
|
|
|
/* Flow Control */
|
|
regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
|
|
regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
|
|
regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
|
|
regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
|
|
regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
|
|
regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
|
|
regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
|
|
|
|
/* Receive DMA */
|
|
for (i = 0; i < 64; i++)
|
|
regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
|
|
for (i = 0; i < 64; i++)
|
|
regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
|
|
for (i = 0; i < 64; i++)
|
|
regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
|
|
for (i = 0; i < 64; i++)
|
|
regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
|
|
for (i = 0; i < 64; i++)
|
|
regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
|
|
for (i = 0; i < 64; i++)
|
|
regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
|
|
for (i = 0; i < 16; i++)
|
|
regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
|
|
for (i = 0; i < 16; i++)
|
|
regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
|
|
regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
|
|
regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
|
|
regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
|
|
|
|
/* Receive */
|
|
regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
|
|
regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
|
|
for (i = 0; i < 16; i++)
|
|
regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
|
|
for (i = 0; i < 16; i++)
|
|
regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
|
|
regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
|
|
regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
|
|
regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
|
|
regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
|
|
regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
|
|
regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
|
|
regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
|
|
|
|
/* Transmit */
|
|
for (i = 0; i < 32; i++)
|
|
regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
|
|
for (i = 0; i < 32; i++)
|
|
regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
|
|
for (i = 0; i < 32; i++)
|
|
regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
|
|
for (i = 0; i < 32; i++)
|
|
regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
|
|
for (i = 0; i < 32; i++)
|
|
regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
|
|
for (i = 0; i < 32; i++)
|
|
regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
|
|
for (i = 0; i < 32; i++)
|
|
regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
|
|
for (i = 0; i < 32; i++)
|
|
regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
|
|
regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
|
|
for (i = 0; i < 16; i++)
|
|
regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
|
|
regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
|
|
regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
|
|
|
|
/* Wake Up */
|
|
regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
|
|
regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
|
|
regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
|
|
regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
|
|
regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
|
|
regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
|
|
regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
|
|
regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
|
|
regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
|
|
|
|
regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
|
|
regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
|
|
regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
|
|
regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
|
|
|
|
/* Statistics */
|
|
regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
|
|
regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
|
|
regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
|
|
regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
|
|
regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
|
|
regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
|
|
regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
|
|
regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
|
|
regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
|
|
regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
|
|
regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
|
|
regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
|
|
regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
|
|
regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
|
|
regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
|
|
regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
|
|
regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
|
|
regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
|
|
regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
|
|
regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
|
|
regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
|
|
regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
|
|
regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
|
|
regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
|
|
regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
|
|
regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
|
|
regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
|
|
regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
|
|
regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
|
|
regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
|
|
regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
|
|
regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
|
|
regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
|
|
regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
|
|
regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
|
|
regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
|
|
regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
|
|
regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
|
|
regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
|
|
regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
|
|
regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
|
|
regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
|
|
for (i = 0; i < 16; i++)
|
|
regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
|
|
for (i = 0; i < 16; i++)
|
|
regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
|
|
for (i = 0; i < 16; i++)
|
|
regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
|
|
for (i = 0; i < 16; i++)
|
|
regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
|
|
|
|
/* MAC */
|
|
regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
|
|
regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
|
|
regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
|
|
regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
|
|
regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
|
|
regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
|
|
regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
|
|
regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
|
|
regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
|
|
regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
|
|
regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
|
|
regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
|
|
regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
|
|
regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
|
|
regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
|
|
regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
|
|
regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
|
|
regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
|
|
regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
|
|
regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
|
|
regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
|
|
regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
|
|
regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
|
|
regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
|
|
regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
|
|
regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
|
|
regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
|
|
regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
|
|
regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
|
|
regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
|
|
regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
|
|
regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
|
|
regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
|
|
|
|
/* Diagnostic */
|
|
regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
|
|
regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
|
|
for (i = 0; i < 4; i++)
|
|
regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
|
|
regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
|
|
regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
|
|
regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
|
|
for (i = 0; i < 4; i++)
|
|
regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
|
|
regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
|
|
regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
|
|
regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
|
|
regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
|
|
regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
|
|
regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
|
|
regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
|
|
regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
|
|
regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
|
|
regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
|
|
regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
|
|
for (i = 0; i < 8; i++)
|
|
regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
|
|
regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
|
|
regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
|
|
regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
|
|
regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
|
|
regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
|
|
regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
|
|
regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
|
|
regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
|
|
regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
|
|
}
|
|
|
|
static int ixgbe_get_eeprom_len(struct net_device *netdev)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
return adapter->hw.eeprom.word_size * 2;
|
|
}
|
|
|
|
static int ixgbe_get_eeprom(struct net_device *netdev,
|
|
struct ethtool_eeprom *eeprom, u8 *bytes)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
struct ixgbe_hw *hw = &adapter->hw;
|
|
u16 *eeprom_buff;
|
|
int first_word, last_word, eeprom_len;
|
|
int ret_val = 0;
|
|
u16 i;
|
|
|
|
if (eeprom->len == 0)
|
|
return -EINVAL;
|
|
|
|
eeprom->magic = hw->vendor_id | (hw->device_id << 16);
|
|
|
|
first_word = eeprom->offset >> 1;
|
|
last_word = (eeprom->offset + eeprom->len - 1) >> 1;
|
|
eeprom_len = last_word - first_word + 1;
|
|
|
|
eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
|
|
if (!eeprom_buff)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < eeprom_len; i++) {
|
|
if ((ret_val = hw->eeprom.ops.read(hw, first_word + i,
|
|
&eeprom_buff[i])))
|
|
break;
|
|
}
|
|
|
|
/* Device's eeprom is always little-endian, word addressable */
|
|
for (i = 0; i < eeprom_len; i++)
|
|
le16_to_cpus(&eeprom_buff[i]);
|
|
|
|
memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
|
|
kfree(eeprom_buff);
|
|
|
|
return ret_val;
|
|
}
|
|
|
|
static void ixgbe_get_drvinfo(struct net_device *netdev,
|
|
struct ethtool_drvinfo *drvinfo)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
char firmware_version[32];
|
|
|
|
strncpy(drvinfo->driver, ixgbe_driver_name, 32);
|
|
strncpy(drvinfo->version, ixgbe_driver_version, 32);
|
|
|
|
sprintf(firmware_version, "%d.%d-%d",
|
|
(adapter->eeprom_version & 0xF000) >> 12,
|
|
(adapter->eeprom_version & 0x0FF0) >> 4,
|
|
adapter->eeprom_version & 0x000F);
|
|
|
|
strncpy(drvinfo->fw_version, firmware_version, 32);
|
|
strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
|
|
drvinfo->n_stats = IXGBE_STATS_LEN;
|
|
drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
|
|
}
|
|
|
|
static void ixgbe_get_ringparam(struct net_device *netdev,
|
|
struct ethtool_ringparam *ring)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
struct ixgbe_ring *tx_ring = adapter->tx_ring;
|
|
struct ixgbe_ring *rx_ring = adapter->rx_ring;
|
|
|
|
ring->rx_max_pending = IXGBE_MAX_RXD;
|
|
ring->tx_max_pending = IXGBE_MAX_TXD;
|
|
ring->rx_mini_max_pending = 0;
|
|
ring->rx_jumbo_max_pending = 0;
|
|
ring->rx_pending = rx_ring->count;
|
|
ring->tx_pending = tx_ring->count;
|
|
ring->rx_mini_pending = 0;
|
|
ring->rx_jumbo_pending = 0;
|
|
}
|
|
|
|
static int ixgbe_set_ringparam(struct net_device *netdev,
|
|
struct ethtool_ringparam *ring)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
struct ixgbe_ring *temp_tx_ring, *temp_rx_ring;
|
|
int i, err;
|
|
u32 new_rx_count, new_tx_count;
|
|
bool need_update = false;
|
|
|
|
if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
|
|
return -EINVAL;
|
|
|
|
new_rx_count = max(ring->rx_pending, (u32)IXGBE_MIN_RXD);
|
|
new_rx_count = min(new_rx_count, (u32)IXGBE_MAX_RXD);
|
|
new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
|
|
|
|
new_tx_count = max(ring->tx_pending, (u32)IXGBE_MIN_TXD);
|
|
new_tx_count = min(new_tx_count, (u32)IXGBE_MAX_TXD);
|
|
new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
|
|
|
|
if ((new_tx_count == adapter->tx_ring->count) &&
|
|
(new_rx_count == adapter->rx_ring->count)) {
|
|
/* nothing to do */
|
|
return 0;
|
|
}
|
|
|
|
while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
|
|
msleep(1);
|
|
|
|
temp_tx_ring = kcalloc(adapter->num_tx_queues,
|
|
sizeof(struct ixgbe_ring), GFP_KERNEL);
|
|
if (!temp_tx_ring) {
|
|
err = -ENOMEM;
|
|
goto err_setup;
|
|
}
|
|
|
|
if (new_tx_count != adapter->tx_ring_count) {
|
|
memcpy(temp_tx_ring, adapter->tx_ring,
|
|
adapter->num_tx_queues * sizeof(struct ixgbe_ring));
|
|
for (i = 0; i < adapter->num_tx_queues; i++) {
|
|
temp_tx_ring[i].count = new_tx_count;
|
|
err = ixgbe_setup_tx_resources(adapter,
|
|
&temp_tx_ring[i]);
|
|
if (err) {
|
|
while (i) {
|
|
i--;
|
|
ixgbe_free_tx_resources(adapter,
|
|
&temp_tx_ring[i]);
|
|
}
|
|
goto err_setup;
|
|
}
|
|
temp_tx_ring[i].v_idx = adapter->tx_ring[i].v_idx;
|
|
}
|
|
need_update = true;
|
|
}
|
|
|
|
temp_rx_ring = kcalloc(adapter->num_rx_queues,
|
|
sizeof(struct ixgbe_ring), GFP_KERNEL);
|
|
if ((!temp_rx_ring) && (need_update)) {
|
|
for (i = 0; i < adapter->num_tx_queues; i++)
|
|
ixgbe_free_tx_resources(adapter, &temp_tx_ring[i]);
|
|
kfree(temp_tx_ring);
|
|
err = -ENOMEM;
|
|
goto err_setup;
|
|
}
|
|
|
|
if (new_rx_count != adapter->rx_ring_count) {
|
|
memcpy(temp_rx_ring, adapter->rx_ring,
|
|
adapter->num_rx_queues * sizeof(struct ixgbe_ring));
|
|
for (i = 0; i < adapter->num_rx_queues; i++) {
|
|
temp_rx_ring[i].count = new_rx_count;
|
|
err = ixgbe_setup_rx_resources(adapter,
|
|
&temp_rx_ring[i]);
|
|
if (err) {
|
|
while (i) {
|
|
i--;
|
|
ixgbe_free_rx_resources(adapter,
|
|
&temp_rx_ring[i]);
|
|
}
|
|
goto err_setup;
|
|
}
|
|
temp_rx_ring[i].v_idx = adapter->rx_ring[i].v_idx;
|
|
}
|
|
need_update = true;
|
|
}
|
|
|
|
/* if rings need to be updated, here's the place to do it in one shot */
|
|
if (need_update) {
|
|
if (netif_running(netdev))
|
|
ixgbe_down(adapter);
|
|
|
|
/* tx */
|
|
if (new_tx_count != adapter->tx_ring_count) {
|
|
kfree(adapter->tx_ring);
|
|
adapter->tx_ring = temp_tx_ring;
|
|
temp_tx_ring = NULL;
|
|
adapter->tx_ring_count = new_tx_count;
|
|
}
|
|
|
|
/* rx */
|
|
if (new_rx_count != adapter->rx_ring_count) {
|
|
kfree(adapter->rx_ring);
|
|
adapter->rx_ring = temp_rx_ring;
|
|
temp_rx_ring = NULL;
|
|
adapter->rx_ring_count = new_rx_count;
|
|
}
|
|
}
|
|
|
|
/* success! */
|
|
err = 0;
|
|
if (netif_running(netdev))
|
|
ixgbe_up(adapter);
|
|
|
|
err_setup:
|
|
clear_bit(__IXGBE_RESETTING, &adapter->state);
|
|
return err;
|
|
}
|
|
|
|
static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
|
|
{
|
|
switch (sset) {
|
|
case ETH_SS_STATS:
|
|
return IXGBE_STATS_LEN;
|
|
default:
|
|
return -EOPNOTSUPP;
|
|
}
|
|
}
|
|
|
|
static void ixgbe_get_ethtool_stats(struct net_device *netdev,
|
|
struct ethtool_stats *stats, u64 *data)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
u64 *queue_stat;
|
|
int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
|
|
int j, k;
|
|
int i;
|
|
|
|
ixgbe_update_stats(adapter);
|
|
for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
|
|
char *p = (char *)adapter + ixgbe_gstrings_stats[i].stat_offset;
|
|
data[i] = (ixgbe_gstrings_stats[i].sizeof_stat ==
|
|
sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
|
|
}
|
|
for (j = 0; j < adapter->num_tx_queues; j++) {
|
|
queue_stat = (u64 *)&adapter->tx_ring[j].stats;
|
|
for (k = 0; k < stat_count; k++)
|
|
data[i + k] = queue_stat[k];
|
|
i += k;
|
|
}
|
|
for (j = 0; j < adapter->num_rx_queues; j++) {
|
|
queue_stat = (u64 *)&adapter->rx_ring[j].stats;
|
|
for (k = 0; k < stat_count; k++)
|
|
data[i + k] = queue_stat[k];
|
|
i += k;
|
|
}
|
|
if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
|
|
for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
|
|
data[i++] = adapter->stats.pxontxc[j];
|
|
data[i++] = adapter->stats.pxofftxc[j];
|
|
}
|
|
for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
|
|
data[i++] = adapter->stats.pxonrxc[j];
|
|
data[i++] = adapter->stats.pxoffrxc[j];
|
|
}
|
|
}
|
|
}
|
|
|
|
static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
|
|
u8 *data)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
char *p = (char *)data;
|
|
int i;
|
|
|
|
switch (stringset) {
|
|
case ETH_SS_STATS:
|
|
for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
|
|
memcpy(p, ixgbe_gstrings_stats[i].stat_string,
|
|
ETH_GSTRING_LEN);
|
|
p += ETH_GSTRING_LEN;
|
|
}
|
|
for (i = 0; i < adapter->num_tx_queues; i++) {
|
|
sprintf(p, "tx_queue_%u_packets", i);
|
|
p += ETH_GSTRING_LEN;
|
|
sprintf(p, "tx_queue_%u_bytes", i);
|
|
p += ETH_GSTRING_LEN;
|
|
}
|
|
for (i = 0; i < adapter->num_rx_queues; i++) {
|
|
sprintf(p, "rx_queue_%u_packets", i);
|
|
p += ETH_GSTRING_LEN;
|
|
sprintf(p, "rx_queue_%u_bytes", i);
|
|
p += ETH_GSTRING_LEN;
|
|
}
|
|
if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
|
|
for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
|
|
sprintf(p, "tx_pb_%u_pxon", i);
|
|
p += ETH_GSTRING_LEN;
|
|
sprintf(p, "tx_pb_%u_pxoff", i);
|
|
p += ETH_GSTRING_LEN;
|
|
}
|
|
for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
|
|
sprintf(p, "rx_pb_%u_pxon", i);
|
|
p += ETH_GSTRING_LEN;
|
|
sprintf(p, "rx_pb_%u_pxoff", i);
|
|
p += ETH_GSTRING_LEN;
|
|
}
|
|
}
|
|
/* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
|
|
break;
|
|
}
|
|
}
|
|
|
|
|
|
static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
|
|
struct ethtool_wolinfo *wol)
|
|
{
|
|
struct ixgbe_hw *hw = &adapter->hw;
|
|
int retval = 1;
|
|
|
|
switch(hw->device_id) {
|
|
case IXGBE_DEV_ID_82599_KX4:
|
|
retval = 0;
|
|
break;
|
|
default:
|
|
wol->supported = 0;
|
|
retval = 0;
|
|
}
|
|
|
|
return retval;
|
|
}
|
|
|
|
static void ixgbe_get_wol(struct net_device *netdev,
|
|
struct ethtool_wolinfo *wol)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
wol->supported = WAKE_UCAST | WAKE_MCAST |
|
|
WAKE_BCAST | WAKE_MAGIC;
|
|
wol->wolopts = 0;
|
|
|
|
if (ixgbe_wol_exclusion(adapter, wol) ||
|
|
!device_can_wakeup(&adapter->pdev->dev))
|
|
return;
|
|
|
|
if (adapter->wol & IXGBE_WUFC_EX)
|
|
wol->wolopts |= WAKE_UCAST;
|
|
if (adapter->wol & IXGBE_WUFC_MC)
|
|
wol->wolopts |= WAKE_MCAST;
|
|
if (adapter->wol & IXGBE_WUFC_BC)
|
|
wol->wolopts |= WAKE_BCAST;
|
|
if (adapter->wol & IXGBE_WUFC_MAG)
|
|
wol->wolopts |= WAKE_MAGIC;
|
|
|
|
return;
|
|
}
|
|
|
|
static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
|
|
return -EOPNOTSUPP;
|
|
|
|
if (ixgbe_wol_exclusion(adapter, wol))
|
|
return wol->wolopts ? -EOPNOTSUPP : 0;
|
|
|
|
adapter->wol = 0;
|
|
|
|
if (wol->wolopts & WAKE_UCAST)
|
|
adapter->wol |= IXGBE_WUFC_EX;
|
|
if (wol->wolopts & WAKE_MCAST)
|
|
adapter->wol |= IXGBE_WUFC_MC;
|
|
if (wol->wolopts & WAKE_BCAST)
|
|
adapter->wol |= IXGBE_WUFC_BC;
|
|
if (wol->wolopts & WAKE_MAGIC)
|
|
adapter->wol |= IXGBE_WUFC_MAG;
|
|
|
|
device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ixgbe_nway_reset(struct net_device *netdev)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
if (netif_running(netdev))
|
|
ixgbe_reinit_locked(adapter);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ixgbe_phys_id(struct net_device *netdev, u32 data)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
struct ixgbe_hw *hw = &adapter->hw;
|
|
u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
|
|
u32 i;
|
|
|
|
if (!data || data > 300)
|
|
data = 300;
|
|
|
|
for (i = 0; i < (data * 1000); i += 400) {
|
|
hw->mac.ops.led_on(hw, IXGBE_LED_ON);
|
|
msleep_interruptible(200);
|
|
hw->mac.ops.led_off(hw, IXGBE_LED_ON);
|
|
msleep_interruptible(200);
|
|
}
|
|
|
|
/* Restore LED settings */
|
|
IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, led_reg);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ixgbe_get_coalesce(struct net_device *netdev,
|
|
struct ethtool_coalesce *ec)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0].work_limit;
|
|
|
|
/* only valid if in constant ITR mode */
|
|
switch (adapter->itr_setting) {
|
|
case 0:
|
|
/* throttling disabled */
|
|
ec->rx_coalesce_usecs = 0;
|
|
break;
|
|
case 1:
|
|
/* dynamic ITR mode */
|
|
ec->rx_coalesce_usecs = 1;
|
|
break;
|
|
default:
|
|
/* fixed interrupt rate mode */
|
|
ec->rx_coalesce_usecs = 1000000/adapter->eitr_param;
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int ixgbe_set_coalesce(struct net_device *netdev,
|
|
struct ethtool_coalesce *ec)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
int i;
|
|
|
|
if (ec->tx_max_coalesced_frames_irq)
|
|
adapter->tx_ring[0].work_limit = ec->tx_max_coalesced_frames_irq;
|
|
|
|
if (ec->rx_coalesce_usecs > 1) {
|
|
/* check the limits */
|
|
if ((1000000/ec->rx_coalesce_usecs > IXGBE_MAX_INT_RATE) ||
|
|
(1000000/ec->rx_coalesce_usecs < IXGBE_MIN_INT_RATE))
|
|
return -EINVAL;
|
|
|
|
/* store the value in ints/second */
|
|
adapter->eitr_param = 1000000/ec->rx_coalesce_usecs;
|
|
|
|
/* static value of interrupt rate */
|
|
adapter->itr_setting = adapter->eitr_param;
|
|
/* clear the lower bit as its used for dynamic state */
|
|
adapter->itr_setting &= ~1;
|
|
} else if (ec->rx_coalesce_usecs == 1) {
|
|
/* 1 means dynamic mode */
|
|
adapter->eitr_param = 20000;
|
|
adapter->itr_setting = 1;
|
|
} else {
|
|
/*
|
|
* any other value means disable eitr, which is best
|
|
* served by setting the interrupt rate very high
|
|
*/
|
|
adapter->eitr_param = IXGBE_MAX_INT_RATE;
|
|
adapter->itr_setting = 0;
|
|
}
|
|
|
|
for (i = 0; i < adapter->num_msix_vectors - NON_Q_VECTORS; i++) {
|
|
struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
|
|
if (q_vector->txr_count && !q_vector->rxr_count)
|
|
/* tx vector gets half the rate */
|
|
q_vector->eitr = (adapter->eitr_param >> 1);
|
|
else
|
|
/* rx only or mixed */
|
|
q_vector->eitr = adapter->eitr_param;
|
|
ixgbe_write_eitr(adapter, i,
|
|
EITR_INTS_PER_SEC_TO_REG(q_vector->eitr));
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ixgbe_set_flags(struct net_device *netdev, u32 data)
|
|
{
|
|
struct ixgbe_adapter *adapter = netdev_priv(netdev);
|
|
|
|
ethtool_op_set_flags(netdev, data);
|
|
|
|
if (!(adapter->flags & IXGBE_FLAG_RSC_CAPABLE))
|
|
return 0;
|
|
|
|
/* if state changes we need to update adapter->flags and reset */
|
|
if ((!!(data & ETH_FLAG_LRO)) !=
|
|
(!!(adapter->flags & IXGBE_FLAG_RSC_ENABLED))) {
|
|
adapter->flags ^= IXGBE_FLAG_RSC_ENABLED;
|
|
if (netif_running(netdev))
|
|
ixgbe_reinit_locked(adapter);
|
|
else
|
|
ixgbe_reset(adapter);
|
|
}
|
|
return 0;
|
|
|
|
}
|
|
|
|
static const struct ethtool_ops ixgbe_ethtool_ops = {
|
|
.get_settings = ixgbe_get_settings,
|
|
.set_settings = ixgbe_set_settings,
|
|
.get_drvinfo = ixgbe_get_drvinfo,
|
|
.get_regs_len = ixgbe_get_regs_len,
|
|
.get_regs = ixgbe_get_regs,
|
|
.get_wol = ixgbe_get_wol,
|
|
.set_wol = ixgbe_set_wol,
|
|
.nway_reset = ixgbe_nway_reset,
|
|
.get_link = ethtool_op_get_link,
|
|
.get_eeprom_len = ixgbe_get_eeprom_len,
|
|
.get_eeprom = ixgbe_get_eeprom,
|
|
.get_ringparam = ixgbe_get_ringparam,
|
|
.set_ringparam = ixgbe_set_ringparam,
|
|
.get_pauseparam = ixgbe_get_pauseparam,
|
|
.set_pauseparam = ixgbe_set_pauseparam,
|
|
.get_rx_csum = ixgbe_get_rx_csum,
|
|
.set_rx_csum = ixgbe_set_rx_csum,
|
|
.get_tx_csum = ixgbe_get_tx_csum,
|
|
.set_tx_csum = ixgbe_set_tx_csum,
|
|
.get_sg = ethtool_op_get_sg,
|
|
.set_sg = ethtool_op_set_sg,
|
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.get_msglevel = ixgbe_get_msglevel,
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.set_msglevel = ixgbe_set_msglevel,
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.get_tso = ethtool_op_get_tso,
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.set_tso = ixgbe_set_tso,
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|
.get_strings = ixgbe_get_strings,
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|
.phys_id = ixgbe_phys_id,
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|
.get_sset_count = ixgbe_get_sset_count,
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|
.get_ethtool_stats = ixgbe_get_ethtool_stats,
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|
.get_coalesce = ixgbe_get_coalesce,
|
|
.set_coalesce = ixgbe_set_coalesce,
|
|
.get_flags = ethtool_op_get_flags,
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|
.set_flags = ixgbe_set_flags,
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|
};
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|
|
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void ixgbe_set_ethtool_ops(struct net_device *netdev)
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{
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SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
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}
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