ea2e7057c0
dma_alloc_coherent wants to split pages after allocation in order to
reduce the memory footprint. This does not work well with GFP_COMP
pages, so drop this flag before allocation.
This patch is ported from arch/avr32
(commit 3611553ef9
).
[swarren: s/HUGETLB_PAGE/HUGETLBFS/ in comment, minor comment cleanup]
Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
729 lines
18 KiB
C
729 lines
18 KiB
C
/*
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* linux/arch/arm/mm/dma-mapping.c
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*
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* Copyright (C) 2000-2004 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* DMA uncached mapping support.
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*/
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#include <linux/module.h>
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#include <linux/mm.h>
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#include <linux/gfp.h>
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#include <linux/errno.h>
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#include <linux/list.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/dma-mapping.h>
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#include <linux/highmem.h>
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#include <linux/slab.h>
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#include <asm/memory.h>
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#include <asm/highmem.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/sizes.h>
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#include <asm/mach/arch.h>
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#include "mm.h"
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static u64 get_coherent_dma_mask(struct device *dev)
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{
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u64 mask = (u64)arm_dma_limit;
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if (dev) {
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mask = dev->coherent_dma_mask;
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/*
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* Sanity check the DMA mask - it must be non-zero, and
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* must be able to be satisfied by a DMA allocation.
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*/
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if (mask == 0) {
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dev_warn(dev, "coherent DMA mask is unset\n");
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return 0;
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}
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if ((~mask) & (u64)arm_dma_limit) {
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dev_warn(dev, "coherent DMA mask %#llx is smaller "
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"than system GFP_DMA mask %#llx\n",
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mask, (u64)arm_dma_limit);
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return 0;
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}
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}
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return mask;
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}
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/*
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* Allocate a DMA buffer for 'dev' of size 'size' using the
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* specified gfp mask. Note that 'size' must be page aligned.
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*/
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static struct page *__dma_alloc_buffer(struct device *dev, size_t size, gfp_t gfp)
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{
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unsigned long order = get_order(size);
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struct page *page, *p, *e;
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void *ptr;
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u64 mask = get_coherent_dma_mask(dev);
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#ifdef CONFIG_DMA_API_DEBUG
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u64 limit = (mask + 1) & ~mask;
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if (limit && size >= limit) {
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dev_warn(dev, "coherent allocation too big (requested %#x mask %#llx)\n",
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size, mask);
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return NULL;
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}
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#endif
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if (!mask)
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return NULL;
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if (mask < 0xffffffffULL)
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gfp |= GFP_DMA;
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page = alloc_pages(gfp, order);
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if (!page)
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return NULL;
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/*
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* Now split the huge page and free the excess pages
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*/
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split_page(page, order);
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for (p = page + (size >> PAGE_SHIFT), e = page + (1 << order); p < e; p++)
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__free_page(p);
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/*
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* Ensure that the allocated pages are zeroed, and that any data
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* lurking in the kernel direct-mapped region is invalidated.
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*/
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ptr = page_address(page);
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memset(ptr, 0, size);
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dmac_flush_range(ptr, ptr + size);
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outer_flush_range(__pa(ptr), __pa(ptr) + size);
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return page;
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}
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/*
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* Free a DMA buffer. 'size' must be page aligned.
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*/
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static void __dma_free_buffer(struct page *page, size_t size)
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{
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struct page *e = page + (size >> PAGE_SHIFT);
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while (page < e) {
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__free_page(page);
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page++;
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}
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}
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#ifdef CONFIG_MMU
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#define CONSISTENT_OFFSET(x) (((unsigned long)(x) - consistent_base) >> PAGE_SHIFT)
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#define CONSISTENT_PTE_INDEX(x) (((unsigned long)(x) - consistent_base) >> PMD_SHIFT)
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/*
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* These are the page tables (2MB each) covering uncached, DMA consistent allocations
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*/
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static pte_t **consistent_pte;
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#define DEFAULT_CONSISTENT_DMA_SIZE SZ_2M
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unsigned long consistent_base = CONSISTENT_END - DEFAULT_CONSISTENT_DMA_SIZE;
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void __init init_consistent_dma_size(unsigned long size)
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{
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unsigned long base = CONSISTENT_END - ALIGN(size, SZ_2M);
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BUG_ON(consistent_pte); /* Check we're called before DMA region init */
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BUG_ON(base < VMALLOC_END);
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/* Grow region to accommodate specified size */
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if (base < consistent_base)
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consistent_base = base;
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}
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#include "vmregion.h"
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static struct arm_vmregion_head consistent_head = {
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.vm_lock = __SPIN_LOCK_UNLOCKED(&consistent_head.vm_lock),
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.vm_list = LIST_HEAD_INIT(consistent_head.vm_list),
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.vm_end = CONSISTENT_END,
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};
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#ifdef CONFIG_HUGETLB_PAGE
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#error ARM Coherent DMA allocator does not (yet) support huge TLB
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#endif
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/*
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* Initialise the consistent memory allocation.
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*/
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static int __init consistent_init(void)
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{
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int ret = 0;
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pgd_t *pgd;
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pud_t *pud;
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pmd_t *pmd;
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pte_t *pte;
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int i = 0;
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unsigned long base = consistent_base;
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unsigned long num_ptes = (CONSISTENT_END - base) >> PMD_SHIFT;
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consistent_pte = kmalloc(num_ptes * sizeof(pte_t), GFP_KERNEL);
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if (!consistent_pte) {
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pr_err("%s: no memory\n", __func__);
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return -ENOMEM;
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}
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pr_debug("DMA memory: 0x%08lx - 0x%08lx:\n", base, CONSISTENT_END);
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consistent_head.vm_start = base;
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do {
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pgd = pgd_offset(&init_mm, base);
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pud = pud_alloc(&init_mm, pgd, base);
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if (!pud) {
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printk(KERN_ERR "%s: no pud tables\n", __func__);
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ret = -ENOMEM;
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break;
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}
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pmd = pmd_alloc(&init_mm, pud, base);
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if (!pmd) {
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printk(KERN_ERR "%s: no pmd tables\n", __func__);
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ret = -ENOMEM;
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break;
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}
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WARN_ON(!pmd_none(*pmd));
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pte = pte_alloc_kernel(pmd, base);
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if (!pte) {
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printk(KERN_ERR "%s: no pte tables\n", __func__);
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ret = -ENOMEM;
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break;
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}
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consistent_pte[i++] = pte;
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base += PMD_SIZE;
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} while (base < CONSISTENT_END);
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return ret;
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}
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core_initcall(consistent_init);
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static void *
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__dma_alloc_remap(struct page *page, size_t size, gfp_t gfp, pgprot_t prot)
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{
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struct arm_vmregion *c;
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size_t align;
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int bit;
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if (!consistent_pte) {
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printk(KERN_ERR "%s: not initialised\n", __func__);
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dump_stack();
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return NULL;
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}
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/*
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* Align the virtual region allocation - maximum alignment is
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* a section size, minimum is a page size. This helps reduce
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* fragmentation of the DMA space, and also prevents allocations
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* smaller than a section from crossing a section boundary.
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*/
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bit = fls(size - 1);
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if (bit > SECTION_SHIFT)
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bit = SECTION_SHIFT;
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align = 1 << bit;
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/*
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* Allocate a virtual address in the consistent mapping region.
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*/
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c = arm_vmregion_alloc(&consistent_head, align, size,
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gfp & ~(__GFP_DMA | __GFP_HIGHMEM));
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if (c) {
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pte_t *pte;
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int idx = CONSISTENT_PTE_INDEX(c->vm_start);
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u32 off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
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pte = consistent_pte[idx] + off;
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c->vm_pages = page;
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do {
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BUG_ON(!pte_none(*pte));
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set_pte_ext(pte, mk_pte(page, prot), 0);
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page++;
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pte++;
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off++;
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if (off >= PTRS_PER_PTE) {
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off = 0;
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pte = consistent_pte[++idx];
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}
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} while (size -= PAGE_SIZE);
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dsb();
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return (void *)c->vm_start;
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}
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return NULL;
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}
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static void __dma_free_remap(void *cpu_addr, size_t size)
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{
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struct arm_vmregion *c;
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unsigned long addr;
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pte_t *ptep;
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int idx;
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u32 off;
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c = arm_vmregion_find_remove(&consistent_head, (unsigned long)cpu_addr);
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if (!c) {
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printk(KERN_ERR "%s: trying to free invalid coherent area: %p\n",
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__func__, cpu_addr);
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dump_stack();
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return;
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}
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if ((c->vm_end - c->vm_start) != size) {
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printk(KERN_ERR "%s: freeing wrong coherent size (%ld != %d)\n",
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__func__, c->vm_end - c->vm_start, size);
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dump_stack();
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size = c->vm_end - c->vm_start;
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}
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idx = CONSISTENT_PTE_INDEX(c->vm_start);
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off = CONSISTENT_OFFSET(c->vm_start) & (PTRS_PER_PTE-1);
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ptep = consistent_pte[idx] + off;
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addr = c->vm_start;
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do {
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pte_t pte = ptep_get_and_clear(&init_mm, addr, ptep);
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ptep++;
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addr += PAGE_SIZE;
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off++;
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if (off >= PTRS_PER_PTE) {
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off = 0;
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ptep = consistent_pte[++idx];
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}
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if (pte_none(pte) || !pte_present(pte))
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printk(KERN_CRIT "%s: bad page in kernel page table\n",
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__func__);
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} while (size -= PAGE_SIZE);
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flush_tlb_kernel_range(c->vm_start, c->vm_end);
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arm_vmregion_free(&consistent_head, c);
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}
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#else /* !CONFIG_MMU */
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#define __dma_alloc_remap(page, size, gfp, prot) page_address(page)
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#define __dma_free_remap(addr, size) do { } while (0)
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#endif /* CONFIG_MMU */
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static void *
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__dma_alloc(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp,
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pgprot_t prot)
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{
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struct page *page;
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void *addr;
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/*
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* Following is a work-around (a.k.a. hack) to prevent pages
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* with __GFP_COMP being passed to split_page() which cannot
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* handle them. The real problem is that this flag probably
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* should be 0 on ARM as it is not supported on this
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* platform; see CONFIG_HUGETLBFS.
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*/
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gfp &= ~(__GFP_COMP);
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*handle = ~0;
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size = PAGE_ALIGN(size);
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page = __dma_alloc_buffer(dev, size, gfp);
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if (!page)
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return NULL;
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if (!arch_is_coherent())
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addr = __dma_alloc_remap(page, size, gfp, prot);
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else
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addr = page_address(page);
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if (addr)
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*handle = pfn_to_dma(dev, page_to_pfn(page));
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else
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__dma_free_buffer(page, size);
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return addr;
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}
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/*
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* Allocate DMA-coherent memory space and return both the kernel remapped
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* virtual and bus address for that space.
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*/
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void *
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dma_alloc_coherent(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
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{
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void *memory;
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if (dma_alloc_from_coherent(dev, size, handle, &memory))
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return memory;
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return __dma_alloc(dev, size, handle, gfp,
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pgprot_dmacoherent(pgprot_kernel));
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}
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EXPORT_SYMBOL(dma_alloc_coherent);
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/*
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* Allocate a writecombining region, in much the same way as
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* dma_alloc_coherent above.
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*/
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void *
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dma_alloc_writecombine(struct device *dev, size_t size, dma_addr_t *handle, gfp_t gfp)
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{
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return __dma_alloc(dev, size, handle, gfp,
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pgprot_writecombine(pgprot_kernel));
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}
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EXPORT_SYMBOL(dma_alloc_writecombine);
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static int dma_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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int ret = -ENXIO;
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#ifdef CONFIG_MMU
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unsigned long user_size, kern_size;
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struct arm_vmregion *c;
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user_size = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
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c = arm_vmregion_find(&consistent_head, (unsigned long)cpu_addr);
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if (c) {
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unsigned long off = vma->vm_pgoff;
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kern_size = (c->vm_end - c->vm_start) >> PAGE_SHIFT;
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if (off < kern_size &&
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user_size <= (kern_size - off)) {
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ret = remap_pfn_range(vma, vma->vm_start,
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page_to_pfn(c->vm_pages) + off,
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user_size << PAGE_SHIFT,
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vma->vm_page_prot);
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}
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}
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#endif /* CONFIG_MMU */
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return ret;
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}
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int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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vma->vm_page_prot = pgprot_dmacoherent(vma->vm_page_prot);
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return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
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}
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EXPORT_SYMBOL(dma_mmap_coherent);
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int dma_mmap_writecombine(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size)
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{
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vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
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return dma_mmap(dev, vma, cpu_addr, dma_addr, size);
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}
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EXPORT_SYMBOL(dma_mmap_writecombine);
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/*
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* free a page as defined by the above mapping.
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* Must not be called with IRQs disabled.
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*/
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void dma_free_coherent(struct device *dev, size_t size, void *cpu_addr, dma_addr_t handle)
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{
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WARN_ON(irqs_disabled());
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if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
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return;
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size = PAGE_ALIGN(size);
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if (!arch_is_coherent())
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__dma_free_remap(cpu_addr, size);
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__dma_free_buffer(pfn_to_page(dma_to_pfn(dev, handle)), size);
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}
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EXPORT_SYMBOL(dma_free_coherent);
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/*
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* Make an area consistent for devices.
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* Note: Drivers should NOT use this function directly, as it will break
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* platforms with CONFIG_DMABOUNCE.
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* Use the driver DMA support - see dma-mapping.h (dma_sync_*)
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*/
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void ___dma_single_cpu_to_dev(const void *kaddr, size_t size,
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enum dma_data_direction dir)
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{
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unsigned long paddr;
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BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
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dmac_map_area(kaddr, size, dir);
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paddr = __pa(kaddr);
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if (dir == DMA_FROM_DEVICE) {
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outer_inv_range(paddr, paddr + size);
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} else {
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outer_clean_range(paddr, paddr + size);
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}
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/* FIXME: non-speculating: flush on bidirectional mappings? */
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}
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EXPORT_SYMBOL(___dma_single_cpu_to_dev);
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void ___dma_single_dev_to_cpu(const void *kaddr, size_t size,
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enum dma_data_direction dir)
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{
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BUG_ON(!virt_addr_valid(kaddr) || !virt_addr_valid(kaddr + size - 1));
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/* FIXME: non-speculating: not required */
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/* don't bother invalidating if DMA to device */
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if (dir != DMA_TO_DEVICE) {
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unsigned long paddr = __pa(kaddr);
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outer_inv_range(paddr, paddr + size);
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}
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dmac_unmap_area(kaddr, size, dir);
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}
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EXPORT_SYMBOL(___dma_single_dev_to_cpu);
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static void dma_cache_maint_page(struct page *page, unsigned long offset,
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size_t size, enum dma_data_direction dir,
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void (*op)(const void *, size_t, int))
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{
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/*
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* A single sg entry may refer to multiple physically contiguous
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* pages. But we still need to process highmem pages individually.
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* If highmem is not configured then the bulk of this loop gets
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* optimized out.
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*/
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size_t left = size;
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do {
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size_t len = left;
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void *vaddr;
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if (PageHighMem(page)) {
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if (len + offset > PAGE_SIZE) {
|
|
if (offset >= PAGE_SIZE) {
|
|
page += offset / PAGE_SIZE;
|
|
offset %= PAGE_SIZE;
|
|
}
|
|
len = PAGE_SIZE - offset;
|
|
}
|
|
vaddr = kmap_high_get(page);
|
|
if (vaddr) {
|
|
vaddr += offset;
|
|
op(vaddr, len, dir);
|
|
kunmap_high(page);
|
|
} else if (cache_is_vipt()) {
|
|
/* unmapped pages might still be cached */
|
|
vaddr = kmap_atomic(page);
|
|
op(vaddr + offset, len, dir);
|
|
kunmap_atomic(vaddr);
|
|
}
|
|
} else {
|
|
vaddr = page_address(page) + offset;
|
|
op(vaddr, len, dir);
|
|
}
|
|
offset = 0;
|
|
page++;
|
|
left -= len;
|
|
} while (left);
|
|
}
|
|
|
|
void ___dma_page_cpu_to_dev(struct page *page, unsigned long off,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
unsigned long paddr;
|
|
|
|
dma_cache_maint_page(page, off, size, dir, dmac_map_area);
|
|
|
|
paddr = page_to_phys(page) + off;
|
|
if (dir == DMA_FROM_DEVICE) {
|
|
outer_inv_range(paddr, paddr + size);
|
|
} else {
|
|
outer_clean_range(paddr, paddr + size);
|
|
}
|
|
/* FIXME: non-speculating: flush on bidirectional mappings? */
|
|
}
|
|
EXPORT_SYMBOL(___dma_page_cpu_to_dev);
|
|
|
|
void ___dma_page_dev_to_cpu(struct page *page, unsigned long off,
|
|
size_t size, enum dma_data_direction dir)
|
|
{
|
|
unsigned long paddr = page_to_phys(page) + off;
|
|
|
|
/* FIXME: non-speculating: not required */
|
|
/* don't bother invalidating if DMA to device */
|
|
if (dir != DMA_TO_DEVICE)
|
|
outer_inv_range(paddr, paddr + size);
|
|
|
|
dma_cache_maint_page(page, off, size, dir, dmac_unmap_area);
|
|
|
|
/*
|
|
* Mark the D-cache clean for this page to avoid extra flushing.
|
|
*/
|
|
if (dir != DMA_TO_DEVICE && off == 0 && size >= PAGE_SIZE)
|
|
set_bit(PG_dcache_clean, &page->flags);
|
|
}
|
|
EXPORT_SYMBOL(___dma_page_dev_to_cpu);
|
|
|
|
/**
|
|
* dma_map_sg - map a set of SG buffers for streaming mode DMA
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
* @sg: list of buffers
|
|
* @nents: number of buffers to map
|
|
* @dir: DMA transfer direction
|
|
*
|
|
* Map a set of buffers described by scatterlist in streaming mode for DMA.
|
|
* This is the scatter-gather version of the dma_map_single interface.
|
|
* Here the scatter gather list elements are each tagged with the
|
|
* appropriate dma address and length. They are obtained via
|
|
* sg_dma_{address,length}.
|
|
*
|
|
* Device ownership issues as mentioned for dma_map_single are the same
|
|
* here.
|
|
*/
|
|
int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
|
|
enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *s;
|
|
int i, j;
|
|
|
|
BUG_ON(!valid_dma_direction(dir));
|
|
|
|
for_each_sg(sg, s, nents, i) {
|
|
s->dma_address = __dma_map_page(dev, sg_page(s), s->offset,
|
|
s->length, dir);
|
|
if (dma_mapping_error(dev, s->dma_address))
|
|
goto bad_mapping;
|
|
}
|
|
debug_dma_map_sg(dev, sg, nents, nents, dir);
|
|
return nents;
|
|
|
|
bad_mapping:
|
|
for_each_sg(sg, s, i, j)
|
|
__dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(dma_map_sg);
|
|
|
|
/**
|
|
* dma_unmap_sg - unmap a set of SG buffers mapped by dma_map_sg
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
* @sg: list of buffers
|
|
* @nents: number of buffers to unmap (same as was passed to dma_map_sg)
|
|
* @dir: DMA transfer direction (same as was passed to dma_map_sg)
|
|
*
|
|
* Unmap a set of streaming mode DMA translations. Again, CPU access
|
|
* rules concerning calls here are the same as for dma_unmap_single().
|
|
*/
|
|
void dma_unmap_sg(struct device *dev, struct scatterlist *sg, int nents,
|
|
enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *s;
|
|
int i;
|
|
|
|
debug_dma_unmap_sg(dev, sg, nents, dir);
|
|
|
|
for_each_sg(sg, s, nents, i)
|
|
__dma_unmap_page(dev, sg_dma_address(s), sg_dma_len(s), dir);
|
|
}
|
|
EXPORT_SYMBOL(dma_unmap_sg);
|
|
|
|
/**
|
|
* dma_sync_sg_for_cpu
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
* @sg: list of buffers
|
|
* @nents: number of buffers to map (returned from dma_map_sg)
|
|
* @dir: DMA transfer direction (same as was passed to dma_map_sg)
|
|
*/
|
|
void dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
|
|
int nents, enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *s;
|
|
int i;
|
|
|
|
for_each_sg(sg, s, nents, i) {
|
|
if (!dmabounce_sync_for_cpu(dev, sg_dma_address(s), 0,
|
|
sg_dma_len(s), dir))
|
|
continue;
|
|
|
|
__dma_page_dev_to_cpu(sg_page(s), s->offset,
|
|
s->length, dir);
|
|
}
|
|
|
|
debug_dma_sync_sg_for_cpu(dev, sg, nents, dir);
|
|
}
|
|
EXPORT_SYMBOL(dma_sync_sg_for_cpu);
|
|
|
|
/**
|
|
* dma_sync_sg_for_device
|
|
* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
|
|
* @sg: list of buffers
|
|
* @nents: number of buffers to map (returned from dma_map_sg)
|
|
* @dir: DMA transfer direction (same as was passed to dma_map_sg)
|
|
*/
|
|
void dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
|
|
int nents, enum dma_data_direction dir)
|
|
{
|
|
struct scatterlist *s;
|
|
int i;
|
|
|
|
for_each_sg(sg, s, nents, i) {
|
|
if (!dmabounce_sync_for_device(dev, sg_dma_address(s), 0,
|
|
sg_dma_len(s), dir))
|
|
continue;
|
|
|
|
__dma_page_cpu_to_dev(sg_page(s), s->offset,
|
|
s->length, dir);
|
|
}
|
|
|
|
debug_dma_sync_sg_for_device(dev, sg, nents, dir);
|
|
}
|
|
EXPORT_SYMBOL(dma_sync_sg_for_device);
|
|
|
|
/*
|
|
* Return whether the given device DMA address mask can be supported
|
|
* properly. For example, if your device can only drive the low 24-bits
|
|
* during bus mastering, then you would pass 0x00ffffff as the mask
|
|
* to this function.
|
|
*/
|
|
int dma_supported(struct device *dev, u64 mask)
|
|
{
|
|
if (mask < (u64)arm_dma_limit)
|
|
return 0;
|
|
return 1;
|
|
}
|
|
EXPORT_SYMBOL(dma_supported);
|
|
|
|
int dma_set_mask(struct device *dev, u64 dma_mask)
|
|
{
|
|
if (!dev->dma_mask || !dma_supported(dev, dma_mask))
|
|
return -EIO;
|
|
|
|
#ifndef CONFIG_DMABOUNCE
|
|
*dev->dma_mask = dma_mask;
|
|
#endif
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL(dma_set_mask);
|
|
|
|
#define PREALLOC_DMA_DEBUG_ENTRIES 4096
|
|
|
|
static int __init dma_debug_do_init(void)
|
|
{
|
|
dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
|
|
return 0;
|
|
}
|
|
fs_initcall(dma_debug_do_init);
|