kernel-fxtec-pro1x/arch
David S. Miller 7cc8583372 sparc64: Fix MSIQ HV call ordering in pci_sun4v_msiq_build_irq().
This silently was working for many years and stopped working on
Niagara-T3 machines.

We need to set the MSIQ to VALID before we can set it's state to IDLE.

On Niagara-T3, setting the state to IDLE first was causing HV_EINVAL
errors.  The hypervisor documentation says, rather ambiguously, that
the MSIQ must be "initialized" before one can set the state.

I previously understood this to mean merely that a successful setconf()
operation has been performed on the MSIQ, which we have done at this
point.  But it seems to also mean that it has been set VALID too.

Signed-off-by: David S. Miller <davem@davemloft.net>
2011-12-22 13:46:53 -08:00
..
alpha
arm Merge branch 'rmobile-fixes-for-linus' of git://github.com/pmundt/linux-sh 2011-12-20 11:32:18 -08:00
avr32
blackfin
cris
frv
h8300
hexagon
ia64
m32r
m68k
microblaze
mips
mn10300
openrisc
parisc
powerpc
s390 oprofile: Fix uninitialized memory access when writing to writing to oprofilefs 2011-12-19 17:18:43 +01:00
score
sh
sparc sparc64: Fix MSIQ HV call ordering in pci_sun4v_msiq_build_irq(). 2011-12-22 13:46:53 -08:00
tile
um
unicore32
x86 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net 2011-12-21 18:29:26 -08:00
xtensa
.gitignore
Kconfig