0e00f7aed6
Intel Archiecture Software Developer's Manual section 7.1.3 specifies that a core serializing instruction such as "cpuid" should be executed on _each_ core before the new instruction is made visible. Failure to do so can lead to unspecified behavior (Intel XMC erratas include General Protection Fault in the list), so we should avoid this at all cost. This problem can affect modified code executed by interrupt handlers after interrupt are re-enabled at the end of stop_machine, because no core serializing instruction is executed between the code modification and the moment interrupts are reenabled. Because stop_machine_text_poke performs the text modification from the first CPU decrementing stop_machine_first, modified code executed in thread context is also affected by this problem. To explain why, we have to split the CPUs in two categories: the CPU that initiates the text modification (calls text_poke_smp) and all the others. The scheduler, executed on all other CPUs after stop_machine, issues an "iret" core serializing instruction, and therefore handles core serialization for all these CPUs. However, the text modification initiator can continue its execution on the same thread and access the modified text without any scheduler call. Given that the CPU that initiates the code modification is not guaranteed to be the one actually performing the code modification, it falls into the XMC errata. Q: Isn't this executed from an IPI handler, which will return with IRET (a serializing instruction) anyway? A: No, now stop_machine uses per-cpu workqueue, so that handler will be executed from worker threads. There is no iret anymore. Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers@efficios.com> LKML-Reference: <20110303160137.GB1590@Krystal> Reviewed-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com> Cc: <stable@kernel.org> Cc: Arjan van de Ven <arjan@infradead.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Steven Rostedt <rostedt@goodmis.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Andi Kleen <andi@firstfloor.org> Cc: Frederic Weisbecker <fweisbec@gmail.com> Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
706 lines
19 KiB
C
706 lines
19 KiB
C
#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/mutex.h>
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#include <linux/list.h>
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#include <linux/stringify.h>
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#include <linux/kprobes.h>
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#include <linux/mm.h>
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#include <linux/vmalloc.h>
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#include <linux/memory.h>
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#include <linux/stop_machine.h>
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#include <linux/slab.h>
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#include <asm/alternative.h>
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#include <asm/sections.h>
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#include <asm/pgtable.h>
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#include <asm/mce.h>
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#include <asm/nmi.h>
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#include <asm/vsyscall.h>
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#include <asm/cacheflush.h>
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#include <asm/tlbflush.h>
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#include <asm/io.h>
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#include <asm/fixmap.h>
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#define MAX_PATCH_LEN (255-1)
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#ifdef CONFIG_HOTPLUG_CPU
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static int smp_alt_once;
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static int __init bootonly(char *str)
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{
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smp_alt_once = 1;
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return 1;
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}
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__setup("smp-alt-boot", bootonly);
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#else
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#define smp_alt_once 1
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#endif
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static int __initdata_or_module debug_alternative;
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static int __init debug_alt(char *str)
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{
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debug_alternative = 1;
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return 1;
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}
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__setup("debug-alternative", debug_alt);
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static int noreplace_smp;
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static int __init setup_noreplace_smp(char *str)
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{
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noreplace_smp = 1;
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return 1;
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}
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__setup("noreplace-smp", setup_noreplace_smp);
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#ifdef CONFIG_PARAVIRT
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static int __initdata_or_module noreplace_paravirt = 0;
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static int __init setup_noreplace_paravirt(char *str)
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{
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noreplace_paravirt = 1;
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return 1;
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}
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__setup("noreplace-paravirt", setup_noreplace_paravirt);
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#endif
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#define DPRINTK(fmt, args...) if (debug_alternative) \
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printk(KERN_DEBUG fmt, args)
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#if defined(GENERIC_NOP1) && !defined(CONFIG_X86_64)
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/* Use inline assembly to define this because the nops are defined
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as inline assembly strings in the include files and we cannot
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get them easily into strings. */
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asm("\t" __stringify(__INITRODATA_OR_MODULE) "\nintelnops: "
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GENERIC_NOP1 GENERIC_NOP2 GENERIC_NOP3 GENERIC_NOP4 GENERIC_NOP5 GENERIC_NOP6
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GENERIC_NOP7 GENERIC_NOP8
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"\t.previous");
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extern const unsigned char intelnops[];
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static const unsigned char *const __initconst_or_module
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intel_nops[ASM_NOP_MAX+1] = {
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NULL,
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intelnops,
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intelnops + 1,
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intelnops + 1 + 2,
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intelnops + 1 + 2 + 3,
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intelnops + 1 + 2 + 3 + 4,
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intelnops + 1 + 2 + 3 + 4 + 5,
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intelnops + 1 + 2 + 3 + 4 + 5 + 6,
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intelnops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
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};
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#endif
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#ifdef K8_NOP1
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asm("\t" __stringify(__INITRODATA_OR_MODULE) "\nk8nops: "
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K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
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K8_NOP7 K8_NOP8
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"\t.previous");
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extern const unsigned char k8nops[];
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static const unsigned char *const __initconst_or_module
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k8_nops[ASM_NOP_MAX+1] = {
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NULL,
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k8nops,
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k8nops + 1,
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k8nops + 1 + 2,
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k8nops + 1 + 2 + 3,
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k8nops + 1 + 2 + 3 + 4,
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k8nops + 1 + 2 + 3 + 4 + 5,
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k8nops + 1 + 2 + 3 + 4 + 5 + 6,
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k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
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};
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#endif
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#if defined(K7_NOP1) && !defined(CONFIG_X86_64)
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asm("\t" __stringify(__INITRODATA_OR_MODULE) "\nk7nops: "
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K7_NOP1 K7_NOP2 K7_NOP3 K7_NOP4 K7_NOP5 K7_NOP6
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K7_NOP7 K7_NOP8
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"\t.previous");
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extern const unsigned char k7nops[];
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static const unsigned char *const __initconst_or_module
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k7_nops[ASM_NOP_MAX+1] = {
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NULL,
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k7nops,
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k7nops + 1,
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k7nops + 1 + 2,
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k7nops + 1 + 2 + 3,
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k7nops + 1 + 2 + 3 + 4,
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k7nops + 1 + 2 + 3 + 4 + 5,
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k7nops + 1 + 2 + 3 + 4 + 5 + 6,
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k7nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
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};
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#endif
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#ifdef P6_NOP1
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asm("\t" __stringify(__INITRODATA_OR_MODULE) "\np6nops: "
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P6_NOP1 P6_NOP2 P6_NOP3 P6_NOP4 P6_NOP5 P6_NOP6
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P6_NOP7 P6_NOP8
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"\t.previous");
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extern const unsigned char p6nops[];
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static const unsigned char *const __initconst_or_module
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p6_nops[ASM_NOP_MAX+1] = {
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NULL,
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p6nops,
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p6nops + 1,
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p6nops + 1 + 2,
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p6nops + 1 + 2 + 3,
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p6nops + 1 + 2 + 3 + 4,
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p6nops + 1 + 2 + 3 + 4 + 5,
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p6nops + 1 + 2 + 3 + 4 + 5 + 6,
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p6nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
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};
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#endif
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#ifdef CONFIG_X86_64
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extern char __vsyscall_0;
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static const unsigned char *const *__init_or_module find_nop_table(void)
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{
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if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL &&
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boot_cpu_has(X86_FEATURE_NOPL))
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return p6_nops;
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else
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return k8_nops;
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}
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#else /* CONFIG_X86_64 */
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static const unsigned char *const *__init_or_module find_nop_table(void)
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{
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if (boot_cpu_has(X86_FEATURE_K8))
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return k8_nops;
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else if (boot_cpu_has(X86_FEATURE_K7))
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return k7_nops;
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else if (boot_cpu_has(X86_FEATURE_NOPL))
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return p6_nops;
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else
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return intel_nops;
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}
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#endif /* CONFIG_X86_64 */
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/* Use this to add nops to a buffer, then text_poke the whole buffer. */
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static void __init_or_module add_nops(void *insns, unsigned int len)
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{
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const unsigned char *const *noptable = find_nop_table();
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while (len > 0) {
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unsigned int noplen = len;
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if (noplen > ASM_NOP_MAX)
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noplen = ASM_NOP_MAX;
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memcpy(insns, noptable[noplen], noplen);
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insns += noplen;
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len -= noplen;
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}
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}
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extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
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extern s32 __smp_locks[], __smp_locks_end[];
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void *text_poke_early(void *addr, const void *opcode, size_t len);
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/* Replace instructions with better alternatives for this CPU type.
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This runs before SMP is initialized to avoid SMP problems with
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self modifying code. This implies that assymetric systems where
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APs have less capabilities than the boot processor are not handled.
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Tough. Make sure you disable such features by hand. */
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void __init_or_module apply_alternatives(struct alt_instr *start,
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struct alt_instr *end)
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{
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struct alt_instr *a;
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u8 insnbuf[MAX_PATCH_LEN];
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DPRINTK("%s: alt table %p -> %p\n", __func__, start, end);
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for (a = start; a < end; a++) {
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u8 *instr = a->instr;
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BUG_ON(a->replacementlen > a->instrlen);
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BUG_ON(a->instrlen > sizeof(insnbuf));
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BUG_ON(a->cpuid >= NCAPINTS*32);
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if (!boot_cpu_has(a->cpuid))
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continue;
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#ifdef CONFIG_X86_64
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/* vsyscall code is not mapped yet. resolve it manually. */
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if (instr >= (u8 *)VSYSCALL_START && instr < (u8*)VSYSCALL_END) {
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instr = __va(instr - (u8*)VSYSCALL_START + (u8*)__pa_symbol(&__vsyscall_0));
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DPRINTK("%s: vsyscall fixup: %p => %p\n",
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__func__, a->instr, instr);
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}
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#endif
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memcpy(insnbuf, a->replacement, a->replacementlen);
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if (*insnbuf == 0xe8 && a->replacementlen == 5)
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*(s32 *)(insnbuf + 1) += a->replacement - a->instr;
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add_nops(insnbuf + a->replacementlen,
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a->instrlen - a->replacementlen);
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text_poke_early(instr, insnbuf, a->instrlen);
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}
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}
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#ifdef CONFIG_SMP
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static void alternatives_smp_lock(const s32 *start, const s32 *end,
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u8 *text, u8 *text_end)
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{
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const s32 *poff;
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mutex_lock(&text_mutex);
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for (poff = start; poff < end; poff++) {
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u8 *ptr = (u8 *)poff + *poff;
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if (!*poff || ptr < text || ptr >= text_end)
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continue;
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/* turn DS segment override prefix into lock prefix */
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if (*ptr == 0x3e)
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text_poke(ptr, ((unsigned char []){0xf0}), 1);
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};
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mutex_unlock(&text_mutex);
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}
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static void alternatives_smp_unlock(const s32 *start, const s32 *end,
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u8 *text, u8 *text_end)
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{
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const s32 *poff;
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if (noreplace_smp)
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return;
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mutex_lock(&text_mutex);
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for (poff = start; poff < end; poff++) {
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u8 *ptr = (u8 *)poff + *poff;
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if (!*poff || ptr < text || ptr >= text_end)
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continue;
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/* turn lock prefix into DS segment override prefix */
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if (*ptr == 0xf0)
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text_poke(ptr, ((unsigned char []){0x3E}), 1);
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};
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mutex_unlock(&text_mutex);
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}
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struct smp_alt_module {
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/* what is this ??? */
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struct module *mod;
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char *name;
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/* ptrs to lock prefixes */
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const s32 *locks;
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const s32 *locks_end;
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/* .text segment, needed to avoid patching init code ;) */
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u8 *text;
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u8 *text_end;
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struct list_head next;
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};
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static LIST_HEAD(smp_alt_modules);
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static DEFINE_MUTEX(smp_alt);
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static int smp_mode = 1; /* protected by smp_alt */
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void __init_or_module alternatives_smp_module_add(struct module *mod,
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char *name,
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void *locks, void *locks_end,
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void *text, void *text_end)
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{
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struct smp_alt_module *smp;
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if (noreplace_smp)
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return;
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if (smp_alt_once) {
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if (boot_cpu_has(X86_FEATURE_UP))
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alternatives_smp_unlock(locks, locks_end,
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text, text_end);
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return;
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}
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smp = kzalloc(sizeof(*smp), GFP_KERNEL);
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if (NULL == smp)
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return; /* we'll run the (safe but slow) SMP code then ... */
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smp->mod = mod;
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smp->name = name;
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smp->locks = locks;
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smp->locks_end = locks_end;
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smp->text = text;
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smp->text_end = text_end;
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DPRINTK("%s: locks %p -> %p, text %p -> %p, name %s\n",
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__func__, smp->locks, smp->locks_end,
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smp->text, smp->text_end, smp->name);
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mutex_lock(&smp_alt);
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list_add_tail(&smp->next, &smp_alt_modules);
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if (boot_cpu_has(X86_FEATURE_UP))
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alternatives_smp_unlock(smp->locks, smp->locks_end,
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smp->text, smp->text_end);
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mutex_unlock(&smp_alt);
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}
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void __init_or_module alternatives_smp_module_del(struct module *mod)
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{
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struct smp_alt_module *item;
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if (smp_alt_once || noreplace_smp)
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return;
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mutex_lock(&smp_alt);
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list_for_each_entry(item, &smp_alt_modules, next) {
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if (mod != item->mod)
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continue;
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list_del(&item->next);
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mutex_unlock(&smp_alt);
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DPRINTK("%s: %s\n", __func__, item->name);
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kfree(item);
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return;
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}
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mutex_unlock(&smp_alt);
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}
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bool skip_smp_alternatives;
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void alternatives_smp_switch(int smp)
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{
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struct smp_alt_module *mod;
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#ifdef CONFIG_LOCKDEP
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/*
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* Older binutils section handling bug prevented
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* alternatives-replacement from working reliably.
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*
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* If this still occurs then you should see a hang
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* or crash shortly after this line:
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*/
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printk("lockdep: fixing up alternatives.\n");
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#endif
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if (noreplace_smp || smp_alt_once || skip_smp_alternatives)
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return;
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BUG_ON(!smp && (num_online_cpus() > 1));
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mutex_lock(&smp_alt);
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/*
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* Avoid unnecessary switches because it forces JIT based VMs to
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* throw away all cached translations, which can be quite costly.
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*/
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if (smp == smp_mode) {
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/* nothing */
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} else if (smp) {
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printk(KERN_INFO "SMP alternatives: switching to SMP code\n");
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clear_cpu_cap(&boot_cpu_data, X86_FEATURE_UP);
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clear_cpu_cap(&cpu_data(0), X86_FEATURE_UP);
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list_for_each_entry(mod, &smp_alt_modules, next)
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alternatives_smp_lock(mod->locks, mod->locks_end,
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mod->text, mod->text_end);
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} else {
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printk(KERN_INFO "SMP alternatives: switching to UP code\n");
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set_cpu_cap(&boot_cpu_data, X86_FEATURE_UP);
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set_cpu_cap(&cpu_data(0), X86_FEATURE_UP);
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list_for_each_entry(mod, &smp_alt_modules, next)
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alternatives_smp_unlock(mod->locks, mod->locks_end,
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mod->text, mod->text_end);
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}
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smp_mode = smp;
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mutex_unlock(&smp_alt);
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}
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/* Return 1 if the address range is reserved for smp-alternatives */
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int alternatives_text_reserved(void *start, void *end)
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{
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struct smp_alt_module *mod;
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const s32 *poff;
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u8 *text_start = start;
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u8 *text_end = end;
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list_for_each_entry(mod, &smp_alt_modules, next) {
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if (mod->text > text_end || mod->text_end < text_start)
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continue;
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for (poff = mod->locks; poff < mod->locks_end; poff++) {
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const u8 *ptr = (const u8 *)poff + *poff;
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if (text_start <= ptr && text_end > ptr)
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return 1;
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}
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}
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return 0;
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}
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#endif
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#ifdef CONFIG_PARAVIRT
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void __init_or_module apply_paravirt(struct paravirt_patch_site *start,
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struct paravirt_patch_site *end)
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{
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struct paravirt_patch_site *p;
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char insnbuf[MAX_PATCH_LEN];
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if (noreplace_paravirt)
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return;
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for (p = start; p < end; p++) {
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unsigned int used;
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BUG_ON(p->len > MAX_PATCH_LEN);
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/* prep the buffer with the original instructions */
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memcpy(insnbuf, p->instr, p->len);
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used = pv_init_ops.patch(p->instrtype, p->clobbers, insnbuf,
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(unsigned long)p->instr, p->len);
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BUG_ON(used > p->len);
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/* Pad the rest with nops */
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add_nops(insnbuf + used, p->len - used);
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text_poke_early(p->instr, insnbuf, p->len);
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}
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}
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extern struct paravirt_patch_site __start_parainstructions[],
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__stop_parainstructions[];
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#endif /* CONFIG_PARAVIRT */
|
|
|
|
void __init alternative_instructions(void)
|
|
{
|
|
/* The patching is not fully atomic, so try to avoid local interruptions
|
|
that might execute the to be patched code.
|
|
Other CPUs are not running. */
|
|
stop_nmi();
|
|
|
|
/*
|
|
* Don't stop machine check exceptions while patching.
|
|
* MCEs only happen when something got corrupted and in this
|
|
* case we must do something about the corruption.
|
|
* Ignoring it is worse than a unlikely patching race.
|
|
* Also machine checks tend to be broadcast and if one CPU
|
|
* goes into machine check the others follow quickly, so we don't
|
|
* expect a machine check to cause undue problems during to code
|
|
* patching.
|
|
*/
|
|
|
|
apply_alternatives(__alt_instructions, __alt_instructions_end);
|
|
|
|
/* switch to patch-once-at-boottime-only mode and free the
|
|
* tables in case we know the number of CPUs will never ever
|
|
* change */
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
if (num_possible_cpus() < 2)
|
|
smp_alt_once = 1;
|
|
#endif
|
|
|
|
#ifdef CONFIG_SMP
|
|
if (smp_alt_once) {
|
|
if (1 == num_possible_cpus()) {
|
|
printk(KERN_INFO "SMP alternatives: switching to UP code\n");
|
|
set_cpu_cap(&boot_cpu_data, X86_FEATURE_UP);
|
|
set_cpu_cap(&cpu_data(0), X86_FEATURE_UP);
|
|
|
|
alternatives_smp_unlock(__smp_locks, __smp_locks_end,
|
|
_text, _etext);
|
|
}
|
|
} else {
|
|
alternatives_smp_module_add(NULL, "core kernel",
|
|
__smp_locks, __smp_locks_end,
|
|
_text, _etext);
|
|
|
|
/* Only switch to UP mode if we don't immediately boot others */
|
|
if (num_present_cpus() == 1 || setup_max_cpus <= 1)
|
|
alternatives_smp_switch(0);
|
|
}
|
|
#endif
|
|
apply_paravirt(__parainstructions, __parainstructions_end);
|
|
|
|
if (smp_alt_once)
|
|
free_init_pages("SMP alternatives",
|
|
(unsigned long)__smp_locks,
|
|
(unsigned long)__smp_locks_end);
|
|
|
|
restart_nmi();
|
|
}
|
|
|
|
/**
|
|
* text_poke_early - Update instructions on a live kernel at boot time
|
|
* @addr: address to modify
|
|
* @opcode: source of the copy
|
|
* @len: length to copy
|
|
*
|
|
* When you use this code to patch more than one byte of an instruction
|
|
* you need to make sure that other CPUs cannot execute this code in parallel.
|
|
* Also no thread must be currently preempted in the middle of these
|
|
* instructions. And on the local CPU you need to be protected again NMI or MCE
|
|
* handlers seeing an inconsistent instruction while you patch.
|
|
*/
|
|
void *__init_or_module text_poke_early(void *addr, const void *opcode,
|
|
size_t len)
|
|
{
|
|
unsigned long flags;
|
|
local_irq_save(flags);
|
|
memcpy(addr, opcode, len);
|
|
sync_core();
|
|
local_irq_restore(flags);
|
|
/* Could also do a CLFLUSH here to speed up CPU recovery; but
|
|
that causes hangs on some VIA CPUs. */
|
|
return addr;
|
|
}
|
|
|
|
/**
|
|
* text_poke - Update instructions on a live kernel
|
|
* @addr: address to modify
|
|
* @opcode: source of the copy
|
|
* @len: length to copy
|
|
*
|
|
* Only atomic text poke/set should be allowed when not doing early patching.
|
|
* It means the size must be writable atomically and the address must be aligned
|
|
* in a way that permits an atomic write. It also makes sure we fit on a single
|
|
* page.
|
|
*
|
|
* Note: Must be called under text_mutex.
|
|
*/
|
|
void *__kprobes text_poke(void *addr, const void *opcode, size_t len)
|
|
{
|
|
unsigned long flags;
|
|
char *vaddr;
|
|
struct page *pages[2];
|
|
int i;
|
|
|
|
if (!core_kernel_text((unsigned long)addr)) {
|
|
pages[0] = vmalloc_to_page(addr);
|
|
pages[1] = vmalloc_to_page(addr + PAGE_SIZE);
|
|
} else {
|
|
pages[0] = virt_to_page(addr);
|
|
WARN_ON(!PageReserved(pages[0]));
|
|
pages[1] = virt_to_page(addr + PAGE_SIZE);
|
|
}
|
|
BUG_ON(!pages[0]);
|
|
local_irq_save(flags);
|
|
set_fixmap(FIX_TEXT_POKE0, page_to_phys(pages[0]));
|
|
if (pages[1])
|
|
set_fixmap(FIX_TEXT_POKE1, page_to_phys(pages[1]));
|
|
vaddr = (char *)fix_to_virt(FIX_TEXT_POKE0);
|
|
memcpy(&vaddr[(unsigned long)addr & ~PAGE_MASK], opcode, len);
|
|
clear_fixmap(FIX_TEXT_POKE0);
|
|
if (pages[1])
|
|
clear_fixmap(FIX_TEXT_POKE1);
|
|
local_flush_tlb();
|
|
sync_core();
|
|
/* Could also do a CLFLUSH here to speed up CPU recovery; but
|
|
that causes hangs on some VIA CPUs. */
|
|
for (i = 0; i < len; i++)
|
|
BUG_ON(((char *)addr)[i] != ((char *)opcode)[i]);
|
|
local_irq_restore(flags);
|
|
return addr;
|
|
}
|
|
|
|
/*
|
|
* Cross-modifying kernel text with stop_machine().
|
|
* This code originally comes from immediate value.
|
|
*/
|
|
static atomic_t stop_machine_first;
|
|
static int wrote_text;
|
|
|
|
struct text_poke_params {
|
|
struct text_poke_param *params;
|
|
int nparams;
|
|
};
|
|
|
|
static int __kprobes stop_machine_text_poke(void *data)
|
|
{
|
|
struct text_poke_params *tpp = data;
|
|
struct text_poke_param *p;
|
|
int i;
|
|
|
|
if (atomic_dec_and_test(&stop_machine_first)) {
|
|
for (i = 0; i < tpp->nparams; i++) {
|
|
p = &tpp->params[i];
|
|
text_poke(p->addr, p->opcode, p->len);
|
|
}
|
|
smp_wmb(); /* Make sure other cpus see that this has run */
|
|
wrote_text = 1;
|
|
} else {
|
|
while (!wrote_text)
|
|
cpu_relax();
|
|
smp_mb(); /* Load wrote_text before following execution */
|
|
}
|
|
|
|
for (i = 0; i < tpp->nparams; i++) {
|
|
p = &tpp->params[i];
|
|
flush_icache_range((unsigned long)p->addr,
|
|
(unsigned long)p->addr + p->len);
|
|
}
|
|
/*
|
|
* Intel Archiecture Software Developer's Manual section 7.1.3 specifies
|
|
* that a core serializing instruction such as "cpuid" should be
|
|
* executed on _each_ core before the new instruction is made visible.
|
|
*/
|
|
sync_core();
|
|
return 0;
|
|
}
|
|
|
|
/**
|
|
* text_poke_smp - Update instructions on a live kernel on SMP
|
|
* @addr: address to modify
|
|
* @opcode: source of the copy
|
|
* @len: length to copy
|
|
*
|
|
* Modify multi-byte instruction by using stop_machine() on SMP. This allows
|
|
* user to poke/set multi-byte text on SMP. Only non-NMI/MCE code modifying
|
|
* should be allowed, since stop_machine() does _not_ protect code against
|
|
* NMI and MCE.
|
|
*
|
|
* Note: Must be called under get_online_cpus() and text_mutex.
|
|
*/
|
|
void *__kprobes text_poke_smp(void *addr, const void *opcode, size_t len)
|
|
{
|
|
struct text_poke_params tpp;
|
|
struct text_poke_param p;
|
|
|
|
p.addr = addr;
|
|
p.opcode = opcode;
|
|
p.len = len;
|
|
tpp.params = &p;
|
|
tpp.nparams = 1;
|
|
atomic_set(&stop_machine_first, 1);
|
|
wrote_text = 0;
|
|
/* Use __stop_machine() because the caller already got online_cpus. */
|
|
__stop_machine(stop_machine_text_poke, (void *)&tpp, cpu_online_mask);
|
|
return addr;
|
|
}
|
|
|
|
/**
|
|
* text_poke_smp_batch - Update instructions on a live kernel on SMP
|
|
* @params: an array of text_poke parameters
|
|
* @n: the number of elements in params.
|
|
*
|
|
* Modify multi-byte instruction by using stop_machine() on SMP. Since the
|
|
* stop_machine() is heavy task, it is better to aggregate text_poke requests
|
|
* and do it once if possible.
|
|
*
|
|
* Note: Must be called under get_online_cpus() and text_mutex.
|
|
*/
|
|
void __kprobes text_poke_smp_batch(struct text_poke_param *params, int n)
|
|
{
|
|
struct text_poke_params tpp = {.params = params, .nparams = n};
|
|
|
|
atomic_set(&stop_machine_first, 1);
|
|
wrote_text = 0;
|
|
__stop_machine(stop_machine_text_poke, (void *)&tpp, NULL);
|
|
}
|
|
|
|
#if defined(CONFIG_DYNAMIC_FTRACE) || defined(HAVE_JUMP_LABEL)
|
|
|
|
#ifdef CONFIG_X86_64
|
|
unsigned char ideal_nop5[5] = { 0x66, 0x66, 0x66, 0x66, 0x90 };
|
|
#else
|
|
unsigned char ideal_nop5[5] = { 0x3e, 0x8d, 0x74, 0x26, 0x00 };
|
|
#endif
|
|
|
|
void __init arch_init_ideal_nop5(void)
|
|
{
|
|
/*
|
|
* There is no good nop for all x86 archs. This selection
|
|
* algorithm should be unified with the one in find_nop_table(),
|
|
* but this should be good enough for now.
|
|
*
|
|
* For cases other than the ones below, use the safe (as in
|
|
* always functional) defaults above.
|
|
*/
|
|
#ifdef CONFIG_X86_64
|
|
/* Don't use these on 32 bits due to broken virtualizers */
|
|
if (boot_cpu_data.x86_vendor == X86_VENDOR_INTEL)
|
|
memcpy(ideal_nop5, p6_nops[5], 5);
|
|
#endif
|
|
}
|
|
#endif
|