codec->hw_write is broken now, convert codec->hw_write to snd_soc_write.
The hardware has 2 banks of registers sharing a section in I2C register space.
The 1st bank is the primary one and is cached.
The 2nd bank is for loading coefficients only and they do not need cache.
These coefficients registers are therefore direct writes.
Thus we set cache_bypass flag to deal with this before calling snd_soc_write.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Liam Girdwood <lrg@ti.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
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