95563d343f
This is a fix for the CS5535 errata 111: When the SMBus controller tries to access a non-existing device, it sets the NEGACK bit, SMBus I/O offset 01h[4], to 1 after it detects no acknowledge at the ninth clock. The specification states that the bit can be cleared by writing a 1 to it, but under certain circumstances it is possible for this bit to not clear. Writing a 0 to the bit resets the internal state machine and clears the issue. Since all writable bits in ACBST are W1C bits (write-one-to-clear) the second write doesn't affect any other logic except the buggy NEGACK state machine. The second write clears an internal register which is responsible for "overwriting" the NEGACK bit in ACBST. Signed-off-by: Jordan Crouse <jordan.crouse@amd.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Jean Delvare <khali@linux-fr.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> |
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| .. | ||
| algos | ||
| busses | ||
| chips | ||
| i2c-core.c | ||
| i2c-dev.c | ||
| Kconfig | ||
| Makefile | ||