a9c174302b
The udc uses an shared dma memory space between hard and software. This memory layout is described in ci13xxx_qh and ci13xxx_td which are marked with the attribute ((packed)). The compiler currently does not know about the alignment of the memory layout, and will create strb and ldrb operations. The Datasheet of the synopsys core describes, that some operations on the mapped memory need to be atomic double word operations. I.e. the next pointer addressing in the qhead, as otherwise the hardware will read wrong data and totally stuck. This is also possible while working with the current active td queue, and preparing the td->ptr.next in software while the hardware is still working with the current active td which is supposed to be changed: writeb(0xde, &td->ptr.next + 0x0); /* strb */ writeb(0xad, &td->ptr.next + 0x1); /* strb */ <----- hardware reads value of td->ptr.next and get stuck! writeb(0xbe, &td->ptr.next + 0x2); /* strb */ writeb(0xef, &td->ptr.next + 0x3); /* strb */ This appeares on armv5 machines where the hardware does not support unaligned 32bit operations. This patch adds the attribute ((aligned(4))) to the structures to tell the compiler to use 32bit operations. It also adds an wmb() for the prepared TD data before it gets enqueued into the qhead. Cc: stable <stable@vger.kernel.org> # v3.5 Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Reviewed-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
93 lines
2.4 KiB
C
93 lines
2.4 KiB
C
/*
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* udc.h - ChipIdea UDC structures
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*
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* Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved.
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*
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* Author: David Lopo
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __DRIVERS_USB_CHIPIDEA_UDC_H
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#define __DRIVERS_USB_CHIPIDEA_UDC_H
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#include <linux/list.h>
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#define CTRL_PAYLOAD_MAX 64
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#define RX 0 /* similar to USB_DIR_OUT but can be used as an index */
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#define TX 1 /* similar to USB_DIR_IN but can be used as an index */
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/* DMA layout of transfer descriptors */
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struct ci13xxx_td {
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/* 0 */
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u32 next;
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#define TD_TERMINATE BIT(0)
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#define TD_ADDR_MASK (0xFFFFFFEUL << 5)
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/* 1 */
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u32 token;
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#define TD_STATUS (0x00FFUL << 0)
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#define TD_STATUS_TR_ERR BIT(3)
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#define TD_STATUS_DT_ERR BIT(5)
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#define TD_STATUS_HALTED BIT(6)
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#define TD_STATUS_ACTIVE BIT(7)
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#define TD_MULTO (0x0003UL << 10)
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#define TD_IOC BIT(15)
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#define TD_TOTAL_BYTES (0x7FFFUL << 16)
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/* 2 */
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u32 page[5];
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#define TD_CURR_OFFSET (0x0FFFUL << 0)
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#define TD_FRAME_NUM (0x07FFUL << 0)
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#define TD_RESERVED_MASK (0x0FFFUL << 0)
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} __attribute__ ((packed, aligned(4)));
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/* DMA layout of queue heads */
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struct ci13xxx_qh {
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/* 0 */
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u32 cap;
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#define QH_IOS BIT(15)
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#define QH_MAX_PKT (0x07FFUL << 16)
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#define QH_ZLT BIT(29)
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#define QH_MULT (0x0003UL << 30)
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/* 1 */
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u32 curr;
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/* 2 - 8 */
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struct ci13xxx_td td;
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/* 9 */
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u32 RESERVED;
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struct usb_ctrlrequest setup;
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} __attribute__ ((packed, aligned(4)));
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/**
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* struct ci13xxx_req - usb request representation
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* @req: request structure for gadget drivers
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* @queue: link to QH list
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* @ptr: transfer descriptor for this request
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* @dma: dma address for the transfer descriptor
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* @zptr: transfer descriptor for the zero packet
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* @zdma: dma address of the zero packet's transfer descriptor
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*/
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struct ci13xxx_req {
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struct usb_request req;
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struct list_head queue;
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struct ci13xxx_td *ptr;
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dma_addr_t dma;
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struct ci13xxx_td *zptr;
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dma_addr_t zdma;
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};
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#ifdef CONFIG_USB_CHIPIDEA_UDC
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int ci_hdrc_gadget_init(struct ci13xxx *ci);
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#else
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static inline int ci_hdrc_gadget_init(struct ci13xxx *ci)
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{
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return -ENXIO;
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}
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#endif
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#endif /* __DRIVERS_USB_CHIPIDEA_UDC_H */
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