a72aeefebe
This patch adds an SPI master implementation that operates on top of an underlying TI-SSP port. Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
93 lines
2.8 KiB
C
93 lines
2.8 KiB
C
/*
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* Sequencer Serial Port (SSP) driver for Texas Instruments' SoCs
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*
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* Copyright (C) 2010 Texas Instruments Inc
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#ifndef __TI_SSP_H__
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#define __TI_SSP_H__
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struct ti_ssp_dev_data {
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const char *dev_name;
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void *pdata;
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size_t pdata_size;
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};
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struct ti_ssp_data {
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unsigned long out_clock;
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struct ti_ssp_dev_data dev_data[2];
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};
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struct ti_ssp_spi_data {
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unsigned long iosel;
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int num_cs;
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void (*select)(int cs);
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};
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/*
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* Sequencer port IO pin configuration bits. These do not correlate 1-1 with
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* the hardware. The iosel field in the port data combines iosel1 and iosel2,
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* and is therefore not a direct map to register space. It is best to use the
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* macros below to construct iosel values.
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*
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* least significant 16 bits --> iosel1
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* most significant 16 bits --> iosel2
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*/
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#define SSP_IN 0x0000
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#define SSP_DATA 0x0001
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#define SSP_CLOCK 0x0002
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#define SSP_CHIPSEL 0x0003
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#define SSP_OUT 0x0004
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#define SSP_PIN_SEL(pin, v) ((v) << ((pin) * 3))
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#define SSP_PIN_MASK(pin) SSP_PIN_SEL(pin, 0x7)
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#define SSP_INPUT_SEL(pin) ((pin) << 16)
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/* Sequencer port config bits */
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#define SSP_EARLY_DIN BIT(8)
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#define SSP_DELAY_DOUT BIT(9)
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/* Sequence map definitions */
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#define SSP_CLK_HIGH BIT(0)
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#define SSP_CLK_LOW 0
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#define SSP_DATA_HIGH BIT(1)
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#define SSP_DATA_LOW 0
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#define SSP_CS_HIGH BIT(2)
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#define SSP_CS_LOW 0
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#define SSP_OUT_MODE BIT(3)
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#define SSP_IN_MODE 0
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#define SSP_DATA_REG BIT(4)
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#define SSP_ADDR_REG 0
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#define SSP_OPCODE_DIRECT ((0x0) << 5)
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#define SSP_OPCODE_TOGGLE ((0x1) << 5)
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#define SSP_OPCODE_SHIFT ((0x2) << 5)
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#define SSP_OPCODE_BRANCH0 ((0x4) << 5)
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#define SSP_OPCODE_BRANCH1 ((0x5) << 5)
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#define SSP_OPCODE_BRANCH ((0x6) << 5)
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#define SSP_OPCODE_STOP ((0x7) << 5)
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#define SSP_BRANCH(addr) ((addr) << 8)
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#define SSP_COUNT(cycles) ((cycles) << 8)
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int ti_ssp_raw_read(struct device *dev);
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int ti_ssp_raw_write(struct device *dev, u32 val);
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int ti_ssp_load(struct device *dev, int offs, u32* prog, int len);
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int ti_ssp_run(struct device *dev, u32 pc, u32 input, u32 *output);
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int ti_ssp_set_mode(struct device *dev, int mode);
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int ti_ssp_set_iosel(struct device *dev, u32 iosel);
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#endif /* __TI_SSP_H__ */
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