kernel-fxtec-pro1x/arch/arm/mach-imx/mm-imx27.c
Linus Torvalds 69f1d1a6ac Merge branch 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/devel' of ssh://master.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (128 commits)
  ARM: S5P64X0: External Interrupt Support
  ARM: EXYNOS4: Enable MFC on Samsung NURI
  ARM: EXYNOS4: Enable MFC on universal_c210
  ARM: S5PV210: Enable MFC on Goni
  ARM: S5P: Add support for MFC device
  ARM: EXYNOS4: Add support FIMD on SMDKC210
  ARM: EXYNOS4: Add platform device and helper functions for FIMD
  ARM: EXYNOS4: Add resource definition for FIMD
  ARM: EXYNOS4: Change devname for FIMD clkdev
  ARM: SAMSUNG: Add IRQ_I2S0 definition
  ARM: SAMSUNG: Add platform device for idma
  ARM: EXYNOS4: Add more registers to be saved and restored for PM
  ARM: EXYNOS4: Add more register addresses of CMU
  ARM: EXYNOS4: Add platform device for dwmci driver
  ARM: EXYNOS4: configure rtc-s3c on NURI
  ARM: EXYNOS4: configure MAX8903 secondary charger on NURI
  ARM: EXYNOS4: configure ADC on NURI
  ARM: EXYNOS4: configure MAX17042 fuel gauge on NURI
  ARM: EXYNOS4: configure regulators and PMIC(MAX8997) on NURI
  ARM: EXYNOS4: Increase NR_IRQS for devices with more IRQs
  ...

Fix up tons of silly conflicts:
 - arch/arm/mach-davinci/include/mach/psc.h
 - arch/arm/mach-exynos4/Kconfig
 - arch/arm/mach-exynos4/mach-smdkc210.c
 - arch/arm/mach-exynos4/pm.c
 - arch/arm/mach-imx/mm-imx1.c
 - arch/arm/mach-imx/mm-imx21.c
 - arch/arm/mach-imx/mm-imx25.c
 - arch/arm/mach-imx/mm-imx27.c
 - arch/arm/mach-imx/mm-imx31.c
 - arch/arm/mach-imx/mm-imx35.c
 - arch/arm/mach-mx5/mm.c
 - arch/arm/mach-s5pv210/mach-goni.c
 - arch/arm/mm/Kconfig
2011-07-26 17:41:04 -07:00

89 lines
2.6 KiB
C

/*
* arch/arm/mach-imx/mm-imx27.c
*
* Copyright (C) 2008 Juergen Beisert (kernel@pengutronix.de)
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License
* as published by the Free Software Foundation; either version 2
* of the License, or (at your option) any later version.
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
* MA 02110-1301, USA.
*/
#include <linux/mm.h>
#include <linux/init.h>
#include <mach/hardware.h>
#include <mach/common.h>
#include <mach/devices-common.h>
#include <asm/pgtable.h>
#include <asm/mach/map.h>
#include <mach/irqs.h>
#include <mach/iomux-v1.h>
/* MX27 memory map definition */
static struct map_desc imx27_io_desc[] __initdata = {
/*
* this fixed mapping covers:
* - AIPI1
* - AIPI2
* - AITC
* - ROM Patch
* - and some reserved space
*/
imx_map_entry(MX27, AIPI, MT_DEVICE),
/*
* this fixed mapping covers:
* - CSI
* - ATA
*/
imx_map_entry(MX27, SAHB1, MT_DEVICE),
/*
* this fixed mapping covers:
* - EMI
*/
imx_map_entry(MX27, X_MEMC, MT_DEVICE),
};
/*
* Initialize the memory map. It is called during the
* system startup to create static physical to virtual
* memory map for the IO modules.
*/
void __init mx27_map_io(void)
{
iotable_init(imx27_io_desc, ARRAY_SIZE(imx27_io_desc));
}
void __init imx27_init_early(void)
{
mxc_set_cpu_type(MXC_CPU_MX27);
mxc_arch_reset_init(MX27_IO_ADDRESS(MX27_WDOG_BASE_ADDR));
imx_iomuxv1_init(MX27_IO_ADDRESS(MX27_GPIO_BASE_ADDR),
MX27_NUM_GPIO_PORT);
}
void __init mx27_init_irq(void)
{
mxc_init_irq(MX27_IO_ADDRESS(MX27_AVIC_BASE_ADDR));
}
void __init imx27_soc_init(void)
{
/* i.mx27 has the i.mx21 type gpio */
mxc_register_gpio("imx21-gpio", 0, MX27_GPIO1_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
mxc_register_gpio("imx21-gpio", 1, MX27_GPIO2_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
mxc_register_gpio("imx21-gpio", 2, MX27_GPIO3_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
mxc_register_gpio("imx21-gpio", 3, MX27_GPIO4_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
mxc_register_gpio("imx21-gpio", 4, MX27_GPIO5_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
mxc_register_gpio("imx21-gpio", 5, MX27_GPIO6_BASE_ADDR, SZ_256, MX27_INT_GPIO, 0);
imx_add_imx_dma();
}