7034228792
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
121 lines
3.6 KiB
C
121 lines
3.6 KiB
C
/*
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* ip22-nvram.c: NVRAM and serial EEPROM handling.
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*
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* Copyright (C) 2003 Ladislav Michl (ladis@linux-mips.org)
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*/
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#include <linux/module.h>
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#include <asm/sgi/hpc3.h>
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#include <asm/sgi/ip22.h>
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/* Control opcode for serial eeprom */
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#define EEPROM_READ 0xc000 /* serial memory read */
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#define EEPROM_WEN 0x9800 /* write enable before prog modes */
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#define EEPROM_WRITE 0xa000 /* serial memory write */
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#define EEPROM_WRALL 0x8800 /* write all registers */
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#define EEPROM_WDS 0x8000 /* disable all programming */
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#define EEPROM_PRREAD 0xc000 /* read protect register */
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#define EEPROM_PREN 0x9800 /* enable protect register mode */
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#define EEPROM_PRCLEAR 0xffff /* clear protect register */
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#define EEPROM_PRWRITE 0xa000 /* write protect register */
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#define EEPROM_PRDS 0x8000 /* disable protect register, forever */
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#define EEPROM_EPROT 0x01 /* Protect register enable */
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#define EEPROM_CSEL 0x02 /* Chip select */
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#define EEPROM_ECLK 0x04 /* EEPROM clock */
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#define EEPROM_DATO 0x08 /* Data out */
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#define EEPROM_DATI 0x10 /* Data in */
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/* We need to use these functions early... */
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#define delay() ({ \
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int x; \
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for (x=0; x<100000; x++) __asm__ __volatile__(""); })
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#define eeprom_cs_on(ptr) ({ \
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__raw_writel(__raw_readl(ptr) & ~EEPROM_DATO, ptr); \
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__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \
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__raw_writel(__raw_readl(ptr) & ~EEPROM_EPROT, ptr); \
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delay(); \
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__raw_writel(__raw_readl(ptr) | EEPROM_CSEL, ptr); \
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__raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })
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#define eeprom_cs_off(ptr) ({ \
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__raw_writel(__raw_readl(ptr) & ~EEPROM_ECLK, ptr); \
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__raw_writel(__raw_readl(ptr) & ~EEPROM_CSEL, ptr); \
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__raw_writel(__raw_readl(ptr) | EEPROM_EPROT, ptr); \
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__raw_writel(__raw_readl(ptr) | EEPROM_ECLK, ptr); })
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#define BITS_IN_COMMAND 11
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/*
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* clock in the nvram command and the register number. For the
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* national semiconductor nv ram chip the op code is 3 bits and
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* the address is 6/8 bits.
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*/
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static inline void eeprom_cmd(unsigned int *ctrl, unsigned cmd, unsigned reg)
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{
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unsigned short ser_cmd;
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int i;
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ser_cmd = cmd | (reg << (16 - BITS_IN_COMMAND));
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for (i = 0; i < BITS_IN_COMMAND; i++) {
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if (ser_cmd & (1<<15)) /* if high order bit set */
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__raw_writel(__raw_readl(ctrl) | EEPROM_DATO, ctrl);
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else
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__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
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__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
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delay();
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__raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl);
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delay();
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ser_cmd <<= 1;
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}
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/* see data sheet timing diagram */
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__raw_writel(__raw_readl(ctrl) & ~EEPROM_DATO, ctrl);
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}
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unsigned short ip22_eeprom_read(unsigned int *ctrl, int reg)
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{
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unsigned short res = 0;
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int i;
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__raw_writel(__raw_readl(ctrl) & ~EEPROM_EPROT, ctrl);
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eeprom_cs_on(ctrl);
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eeprom_cmd(ctrl, EEPROM_READ, reg);
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/* clock the data ouf of serial mem */
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for (i = 0; i < 16; i++) {
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__raw_writel(__raw_readl(ctrl) & ~EEPROM_ECLK, ctrl);
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delay();
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__raw_writel(__raw_readl(ctrl) | EEPROM_ECLK, ctrl);
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delay();
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res <<= 1;
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if (__raw_readl(ctrl) & EEPROM_DATI)
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res |= 1;
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}
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eeprom_cs_off(ctrl);
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return res;
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}
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EXPORT_SYMBOL(ip22_eeprom_read);
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/*
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* Read specified register from main NVRAM
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*/
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unsigned short ip22_nvram_read(int reg)
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{
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if (ip22_is_fullhouse())
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/* IP22 (Indigo2 aka FullHouse) stores env variables into
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* 93CS56 Microwire Bus EEPROM 2048 Bit (128x16) */
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return ip22_eeprom_read(&hpc3c0->eeprom, reg);
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else {
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unsigned short tmp;
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/* IP24 (Indy aka Guiness) uses DS1386 8K version */
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reg <<= 1;
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tmp = hpc3c0->bbram[reg++] & 0xff;
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return (tmp << 8) | (hpc3c0->bbram[reg] & 0xff);
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}
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}
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EXPORT_SYMBOL(ip22_nvram_read);
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