kernel-fxtec-pro1x/arch/mips/math-emu/sp_fdp.c
Maciej W. Rozycki b0c2f8fbdb MIPS: math-emu: Optimise qNaN handling in `ieee754sp_fdp'
Rewrite qNaN handling in `ieee754sp_fdp' using the `ieee754_class_nan'
helper recently added, removing the external call to `ieee754sp_isnan'
and reducing the size of code by 16 instructions or 64 bytes.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9692/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-08 01:09:44 +02:00

82 lines
2 KiB
C

/* IEEE754 floating point arithmetic
* single precision
*/
/*
* MIPS floating point support
* Copyright (C) 1994-2000 Algorithmics Ltd.
*
* This program is free software; you can distribute it and/or modify it
* under the terms of the GNU General Public License (Version 2) as
* published by the Free Software Foundation.
*
* This program is distributed in the hope it will be useful, but WITHOUT
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
* for more details.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
*/
#include "ieee754sp.h"
#include "ieee754dp.h"
static inline union ieee754sp ieee754sp_nan_fdp(int xs, u64 xm)
{
return buildsp(xs, SP_EMAX + 1 + SP_EBIAS,
xm >> (DP_FBITS - SP_FBITS));
}
union ieee754sp ieee754sp_fdp(union ieee754dp x)
{
union ieee754sp y;
u32 rm;
COMPXDP;
COMPYSP;
EXPLODEXDP;
ieee754_clearcx();
FLUSHXDP;
switch (xc) {
case IEEE754_CLASS_SNAN:
return ieee754sp_nanxcpt(ieee754sp_nan_fdp(xs, xm));
case IEEE754_CLASS_QNAN:
y = ieee754sp_nan_fdp(xs, xm);
EXPLODEYSP;
if (!ieee754_class_nan(yc))
y = ieee754sp_indef();
return y;
case IEEE754_CLASS_INF:
return ieee754sp_inf(xs);
case IEEE754_CLASS_ZERO:
return ieee754sp_zero(xs);
case IEEE754_CLASS_DNORM:
/* can't possibly be sp representable */
ieee754_setcx(IEEE754_UNDERFLOW);
ieee754_setcx(IEEE754_INEXACT);
if ((ieee754_csr.rm == FPU_CSR_RU && !xs) ||
(ieee754_csr.rm == FPU_CSR_RD && xs))
return ieee754sp_mind(xs);
return ieee754sp_zero(xs);
case IEEE754_CLASS_NORM:
break;
}
/*
* Convert from DP_FBITS to SP_FBITS+3 with sticky right shift.
*/
rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
return ieee754sp_format(xs, xe, rm);
}