14497d31e6
The Freescale hypervisor does not allow guests to write to the timebase registers (virtualizing the timebase register was deemed too complicated), so don't try to synchronize the timebase registers when we're running under the hypervisor. This typically happens when kexec support is enabled. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
88 lines
2.2 KiB
C
88 lines
2.2 KiB
C
/*
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* P4080 DS Setup
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*
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* Maintained by Kumar Gala (see MAINTAINERS for contact information)
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*
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* Copyright 2009 Freescale Semiconductor Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/kernel.h>
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#include <linux/pci.h>
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#include <linux/kdev_t.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <asm/system.h>
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#include <asm/time.h>
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#include <asm/machdep.h>
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#include <asm/pci-bridge.h>
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#include <mm/mmu_decl.h>
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#include <asm/prom.h>
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#include <asm/udbg.h>
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#include <asm/mpic.h>
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#include <linux/of_platform.h>
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#include <sysdev/fsl_soc.h>
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#include <sysdev/fsl_pci.h>
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#include <asm/ehv_pic.h>
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#include "corenet_ds.h"
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/*
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* Called very early, device-tree isn't unflattened
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*/
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static int __init p4080_ds_probe(void)
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{
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unsigned long root = of_get_flat_dt_root();
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#ifdef CONFIG_SMP
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extern struct smp_ops_t smp_85xx_ops;
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#endif
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if (of_flat_dt_is_compatible(root, "fsl,P4080DS"))
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return 1;
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/* Check if we're running under the Freescale hypervisor */
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if (of_flat_dt_is_compatible(root, "fsl,P4080DS-hv")) {
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ppc_md.init_IRQ = ehv_pic_init;
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ppc_md.get_irq = ehv_pic_get_irq;
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ppc_md.restart = fsl_hv_restart;
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ppc_md.power_off = fsl_hv_halt;
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ppc_md.halt = fsl_hv_halt;
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#ifdef CONFIG_SMP
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/*
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* Disable the timebase sync operations because we can't write
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* to the timebase registers under the hypervisor.
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*/
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smp_85xx_ops.give_timebase = NULL;
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smp_85xx_ops.take_timebase = NULL;
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#endif
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return 1;
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}
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return 0;
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}
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define_machine(p4080_ds) {
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.name = "P4080 DS",
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.probe = p4080_ds_probe,
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.setup_arch = corenet_ds_setup_arch,
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.init_IRQ = corenet_ds_pic_init,
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#ifdef CONFIG_PCI
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.pcibios_fixup_bus = fsl_pcibios_fixup_bus,
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#endif
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.get_irq = mpic_get_coreint_irq,
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.restart = fsl_rstcr_restart,
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.calibrate_decr = generic_calibrate_decr,
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.progress = udbg_progress,
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.power_save = e500_idle,
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};
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machine_device_initcall(p4080_ds, corenet_ds_publish_devices);
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#ifdef CONFIG_SWIOTLB
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machine_arch_initcall(p4080_ds, swiotlb_setup_bus_notifier);
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#endif
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