4370ee4d3b
We don't need __smp_prepare_cpu anymore. Signed-off-by: Glauber Costa <gcosta@redhat.com> Signed-off-by: Ingo Molnar <mingo@elte.hu>
910 lines
22 KiB
C
910 lines
22 KiB
C
/*
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* x86 SMP booting functions
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*
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* (c) 1995 Alan Cox, Building #3 <alan@redhat.com>
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* (c) 1998, 1999, 2000 Ingo Molnar <mingo@redhat.com>
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*
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* Much of the core SMP work is based on previous work by Thomas Radke, to
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* whom a great many thanks are extended.
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*
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* Thanks to Intel for making available several different Pentium,
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* Pentium Pro and Pentium-II/Xeon MP machines.
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* Original development of Linux SMP code supported by Caldera.
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*
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* This code is released under the GNU General Public License version 2 or
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* later.
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*
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* Fixes
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* Felix Koop : NR_CPUS used properly
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* Jose Renau : Handle single CPU case.
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* Alan Cox : By repeated request 8) - Total BogoMIPS report.
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* Greg Wright : Fix for kernel stacks panic.
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* Erich Boleyn : MP v1.4 and additional changes.
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* Matthias Sattler : Changes for 2.1 kernel map.
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* Michel Lespinasse : Changes for 2.1 kernel map.
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* Michael Chastain : Change trampoline.S to gnu as.
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* Alan Cox : Dumb bug: 'B' step PPro's are fine
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* Ingo Molnar : Added APIC timers, based on code
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* from Jose Renau
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* Ingo Molnar : various cleanups and rewrites
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* Tigran Aivazian : fixed "0.00 in /proc/uptime on SMP" bug.
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* Maciej W. Rozycki : Bits for genuine 82489DX APICs
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* Martin J. Bligh : Added support for multi-quad systems
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* Dave Jones : Report invalid combinations of Athlon CPUs.
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* Rusty Russell : Hacked into shape for new "hotplug" boot process. */
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/mm.h>
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#include <linux/sched.h>
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#include <linux/kernel_stat.h>
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#include <linux/bootmem.h>
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#include <linux/notifier.h>
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#include <linux/cpu.h>
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#include <linux/percpu.h>
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#include <linux/nmi.h>
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#include <linux/delay.h>
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#include <linux/mc146818rtc.h>
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#include <asm/tlbflush.h>
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#include <asm/desc.h>
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#include <asm/arch_hooks.h>
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#include <asm/nmi.h>
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#include <mach_apic.h>
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#include <mach_wakecpu.h>
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#include <smpboot_hooks.h>
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#include <asm/vmi.h>
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#include <asm/mtrr.h>
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/* which logical CPU number maps to which CPU (physical APIC ID) */
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u16 x86_cpu_to_apicid_init[NR_CPUS] __initdata =
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{ [0 ... NR_CPUS-1] = BAD_APICID };
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void *x86_cpu_to_apicid_early_ptr;
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DEFINE_PER_CPU(u16, x86_cpu_to_apicid) = BAD_APICID;
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EXPORT_PER_CPU_SYMBOL(x86_cpu_to_apicid);
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u16 x86_bios_cpu_apicid_init[NR_CPUS] __initdata
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= { [0 ... NR_CPUS-1] = BAD_APICID };
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void *x86_bios_cpu_apicid_early_ptr;
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DEFINE_PER_CPU(u16, x86_bios_cpu_apicid) = BAD_APICID;
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EXPORT_PER_CPU_SYMBOL(x86_bios_cpu_apicid);
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u8 apicid_2_node[MAX_APICID];
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static void map_cpu_to_logical_apicid(void);
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/* State of each CPU. */
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DEFINE_PER_CPU(int, cpu_state) = { 0 };
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/* Store all idle threads, this can be reused instead of creating
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* a new thread. Also avoids complicated thread destroy functionality
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* for idle threads.
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*/
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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* Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
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* removed after init for !CONFIG_HOTPLUG_CPU.
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*/
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static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
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#define get_idle_for_cpu(x) (per_cpu(idle_thread_array, x))
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#define set_idle_for_cpu(x, p) (per_cpu(idle_thread_array, x) = (p))
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#else
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struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
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#define get_idle_for_cpu(x) (idle_thread_array[(x)])
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#define set_idle_for_cpu(x, p) (idle_thread_array[(x)] = (p))
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#endif
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static atomic_t init_deasserted;
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static void __cpuinit smp_callin(void)
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{
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int cpuid, phys_id;
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unsigned long timeout;
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/*
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* If waken up by an INIT in an 82489DX configuration
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* we may get here before an INIT-deassert IPI reaches
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* our local APIC. We have to wait for the IPI or we'll
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* lock up on an APIC access.
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*/
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wait_for_init_deassert(&init_deasserted);
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/*
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* (This works even if the APIC is not enabled.)
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*/
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phys_id = GET_APIC_ID(apic_read(APIC_ID));
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cpuid = smp_processor_id();
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if (cpu_isset(cpuid, cpu_callin_map)) {
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printk("huh, phys CPU#%d, CPU#%d already present??\n",
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phys_id, cpuid);
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BUG();
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}
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Dprintk("CPU#%d (phys ID: %d) waiting for CALLOUT\n", cpuid, phys_id);
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/*
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* STARTUP IPIs are fragile beasts as they might sometimes
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* trigger some glue motherboard logic. Complete APIC bus
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* silence for 1 second, this overestimates the time the
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* boot CPU is spending to send the up to 2 STARTUP IPIs
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* by a factor of two. This should be enough.
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*/
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/*
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* Waiting 2s total for startup (udelay is not yet working)
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*/
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timeout = jiffies + 2*HZ;
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while (time_before(jiffies, timeout)) {
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/*
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* Has the boot CPU finished it's STARTUP sequence?
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*/
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if (cpu_isset(cpuid, cpu_callout_map))
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break;
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cpu_relax();
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}
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if (!time_before(jiffies, timeout)) {
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printk("BUG: CPU%d started up but did not get a callout!\n",
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cpuid);
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BUG();
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}
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/*
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* the boot CPU has finished the init stage and is spinning
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* on callin_map until we finish. We are free to set up this
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* CPU, first the APIC. (this is probably redundant on most
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* boards)
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*/
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Dprintk("CALLIN, before setup_local_APIC().\n");
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smp_callin_clear_local_apic();
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setup_local_APIC();
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end_local_APIC_setup();
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map_cpu_to_logical_apicid();
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/*
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* Get our bogomips.
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*/
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local_irq_enable();
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calibrate_delay();
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local_irq_disable();
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Dprintk("Stack at about %p\n",&cpuid);
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/*
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* Save our processor parameters
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*/
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smp_store_cpu_info(cpuid);
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/*
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* Allow the master to continue.
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*/
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cpu_set(cpuid, cpu_callin_map);
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}
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/*
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* Activate a secondary processor.
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*/
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static void __cpuinit start_secondary(void *unused)
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{
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/*
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* Don't put *anything* before cpu_init(), SMP booting is too
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* fragile that we want to limit the things done here to the
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* most necessary things.
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*/
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#ifdef CONFIG_VMI
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vmi_bringup();
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#endif
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cpu_init();
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preempt_disable();
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smp_callin();
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/* otherwise gcc will move up smp_processor_id before the cpu_init */
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barrier();
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/*
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* Check TSC synchronization with the BP:
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*/
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check_tsc_sync_target();
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if (nmi_watchdog == NMI_IO_APIC) {
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disable_8259A_irq(0);
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enable_NMI_through_LVT0();
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enable_8259A_irq(0);
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}
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/* This must be done before setting cpu_online_map */
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set_cpu_sibling_map(raw_smp_processor_id());
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wmb();
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/*
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* We need to hold call_lock, so there is no inconsistency
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* between the time smp_call_function() determines number of
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* IPI recipients, and the time when the determination is made
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* for which cpus receive the IPI. Holding this
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* lock helps us to not include this cpu in a currently in progress
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* smp_call_function().
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*/
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lock_ipi_call_lock();
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cpu_set(smp_processor_id(), cpu_online_map);
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unlock_ipi_call_lock();
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per_cpu(cpu_state, smp_processor_id()) = CPU_ONLINE;
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setup_secondary_clock();
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wmb();
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cpu_idle();
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}
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/*
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* Everything has been set up for the secondary
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* CPUs - they just need to reload everything
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* from the task structure
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* This function must not return.
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*/
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void __devinit initialize_secondary(void)
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{
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/*
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* We don't actually need to load the full TSS,
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* basically just the stack pointer and the ip.
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*/
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asm volatile(
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"movl %0,%%esp\n\t"
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"jmp *%1"
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:
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:"m" (current->thread.sp),"m" (current->thread.ip));
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}
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/* Static state in head.S used to set up a CPU */
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extern struct {
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void * sp;
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unsigned short ss;
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} stack_start;
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#ifdef CONFIG_NUMA
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/* which logical CPUs are on which nodes */
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cpumask_t node_to_cpumask_map[MAX_NUMNODES] __read_mostly =
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{ [0 ... MAX_NUMNODES-1] = CPU_MASK_NONE };
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EXPORT_SYMBOL(node_to_cpumask_map);
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/* which node each logical CPU is on */
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int cpu_to_node_map[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = 0 };
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EXPORT_SYMBOL(cpu_to_node_map);
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/* set up a mapping between cpu and node. */
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static inline void map_cpu_to_node(int cpu, int node)
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{
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printk("Mapping cpu %d to node %d\n", cpu, node);
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cpu_set(cpu, node_to_cpumask_map[node]);
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cpu_to_node_map[cpu] = node;
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}
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/* undo a mapping between cpu and node. */
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static inline void unmap_cpu_to_node(int cpu)
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{
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int node;
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printk("Unmapping cpu %d from all nodes\n", cpu);
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for (node = 0; node < MAX_NUMNODES; node ++)
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cpu_clear(cpu, node_to_cpumask_map[node]);
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cpu_to_node_map[cpu] = 0;
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}
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#else /* !CONFIG_NUMA */
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#define map_cpu_to_node(cpu, node) ({})
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#define unmap_cpu_to_node(cpu) ({})
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#endif /* CONFIG_NUMA */
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u8 cpu_2_logical_apicid[NR_CPUS] __read_mostly = { [0 ... NR_CPUS-1] = BAD_APICID };
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static void map_cpu_to_logical_apicid(void)
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{
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int cpu = smp_processor_id();
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int apicid = logical_smp_processor_id();
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int node = apicid_to_node(apicid);
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if (!node_online(node))
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node = first_online_node;
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cpu_2_logical_apicid[cpu] = apicid;
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map_cpu_to_node(cpu, node);
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}
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static void unmap_cpu_to_logical_apicid(int cpu)
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{
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cpu_2_logical_apicid[cpu] = BAD_APICID;
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unmap_cpu_to_node(cpu);
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}
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static inline void __inquire_remote_apic(int apicid)
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{
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unsigned i, regs[] = { APIC_ID >> 4, APIC_LVR >> 4, APIC_SPIV >> 4 };
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char *names[] = { "ID", "VERSION", "SPIV" };
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int timeout;
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u32 status;
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printk(KERN_INFO "Inquiring remote APIC #%d...\n", apicid);
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for (i = 0; i < ARRAY_SIZE(regs); i++) {
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printk(KERN_INFO "... APIC #%d %s: ", apicid, names[i]);
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/*
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* Wait for idle.
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*/
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status = safe_apic_wait_icr_idle();
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if (status)
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printk(KERN_CONT
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"a previous APIC delivery may have failed\n");
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(apicid));
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apic_write_around(APIC_ICR, APIC_DM_REMRD | regs[i]);
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timeout = 0;
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do {
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udelay(100);
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status = apic_read(APIC_ICR) & APIC_ICR_RR_MASK;
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} while (status == APIC_ICR_RR_INPROG && timeout++ < 1000);
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switch (status) {
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case APIC_ICR_RR_VALID:
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status = apic_read(APIC_RRR);
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printk(KERN_CONT "%08x\n", status);
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break;
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default:
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printk(KERN_CONT "failed\n");
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}
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}
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}
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#ifdef WAKE_SECONDARY_VIA_NMI
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/*
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* Poke the other CPU in the eye via NMI to wake it up. Remember that the normal
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* INIT, INIT, STARTUP sequence will reset the chip hard for us, and this
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* won't ... remember to clear down the APIC, etc later.
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*/
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static int __devinit
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wakeup_secondary_cpu(int logical_apicid, unsigned long start_eip)
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{
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unsigned long send_status, accept_status = 0;
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int maxlvt;
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/* Target chip */
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(logical_apicid));
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/* Boot on the stack */
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/* Kick the second */
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apic_write_around(APIC_ICR, APIC_DM_NMI | APIC_DEST_LOGICAL);
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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/*
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* Give the other CPU some time to accept the IPI.
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*/
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udelay(200);
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/*
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* Due to the Pentium erratum 3AP.
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*/
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maxlvt = lapic_get_maxlvt();
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if (maxlvt > 3) {
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apic_read_around(APIC_SPIV);
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apic_write(APIC_ESR, 0);
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}
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accept_status = (apic_read(APIC_ESR) & 0xEF);
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Dprintk("NMI sent.\n");
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if (send_status)
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printk("APIC never delivered???\n");
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if (accept_status)
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printk("APIC delivery error (%lx).\n", accept_status);
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return (send_status | accept_status);
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}
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#endif /* WAKE_SECONDARY_VIA_NMI */
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#ifdef WAKE_SECONDARY_VIA_INIT
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static int __devinit
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wakeup_secondary_cpu(int phys_apicid, unsigned long start_eip)
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{
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unsigned long send_status, accept_status = 0;
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int maxlvt, num_starts, j;
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/*
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* Be paranoid about clearing APIC errors.
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*/
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if (APIC_INTEGRATED(apic_version[phys_apicid])) {
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apic_read_around(APIC_SPIV);
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apic_write(APIC_ESR, 0);
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apic_read(APIC_ESR);
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}
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Dprintk("Asserting INIT.\n");
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/*
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* Turn INIT on target chip
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*/
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/*
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* Send IPI
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*/
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apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_INT_ASSERT
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| APIC_DM_INIT);
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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mdelay(10);
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Dprintk("Deasserting INIT.\n");
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/* Target chip */
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/* Send IPI */
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apic_write_around(APIC_ICR, APIC_INT_LEVELTRIG | APIC_DM_INIT);
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Dprintk("Waiting for send to finish...\n");
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send_status = safe_apic_wait_icr_idle();
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mb();
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atomic_set(&init_deasserted, 1);
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/*
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* Should we send STARTUP IPIs ?
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*
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* Determine this based on the APIC version.
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* If we don't have an integrated APIC, don't send the STARTUP IPIs.
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*/
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if (APIC_INTEGRATED(apic_version[phys_apicid]))
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num_starts = 2;
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else
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num_starts = 0;
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/*
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* Paravirt / VMI wants a startup IPI hook here to set up the
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* target processor state.
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*/
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startup_ipi_hook(phys_apicid, (unsigned long) start_secondary,
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(unsigned long) stack_start.sp);
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/*
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* Run STARTUP IPI loop.
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*/
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Dprintk("#startup loops: %d.\n", num_starts);
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maxlvt = lapic_get_maxlvt();
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for (j = 1; j <= num_starts; j++) {
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Dprintk("Sending STARTUP #%d.\n",j);
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apic_read_around(APIC_SPIV);
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apic_write(APIC_ESR, 0);
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apic_read(APIC_ESR);
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Dprintk("After apic_write.\n");
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/*
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* STARTUP IPI
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*/
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/* Target chip */
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apic_write_around(APIC_ICR2, SET_APIC_DEST_FIELD(phys_apicid));
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/* Boot on the stack */
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/* Kick the second */
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apic_write_around(APIC_ICR, APIC_DM_STARTUP
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| (start_eip >> 12));
|
|
|
|
/*
|
|
* Give the other CPU some time to accept the IPI.
|
|
*/
|
|
udelay(300);
|
|
|
|
Dprintk("Startup point 1.\n");
|
|
|
|
Dprintk("Waiting for send to finish...\n");
|
|
send_status = safe_apic_wait_icr_idle();
|
|
|
|
/*
|
|
* Give the other CPU some time to accept the IPI.
|
|
*/
|
|
udelay(200);
|
|
/*
|
|
* Due to the Pentium erratum 3AP.
|
|
*/
|
|
if (maxlvt > 3) {
|
|
apic_read_around(APIC_SPIV);
|
|
apic_write(APIC_ESR, 0);
|
|
}
|
|
accept_status = (apic_read(APIC_ESR) & 0xEF);
|
|
if (send_status || accept_status)
|
|
break;
|
|
}
|
|
Dprintk("After Startup.\n");
|
|
|
|
if (send_status)
|
|
printk("APIC never delivered???\n");
|
|
if (accept_status)
|
|
printk("APIC delivery error (%lx).\n", accept_status);
|
|
|
|
return (send_status | accept_status);
|
|
}
|
|
#endif /* WAKE_SECONDARY_VIA_INIT */
|
|
|
|
extern cpumask_t cpu_initialized;
|
|
|
|
struct create_idle {
|
|
struct work_struct work;
|
|
struct task_struct *idle;
|
|
struct completion done;
|
|
int cpu;
|
|
};
|
|
|
|
static void __cpuinit do_fork_idle(struct work_struct *work)
|
|
{
|
|
struct create_idle *c_idle =
|
|
container_of(work, struct create_idle, work);
|
|
|
|
c_idle->idle = fork_idle(c_idle->cpu);
|
|
complete(&c_idle->done);
|
|
}
|
|
static int __cpuinit do_boot_cpu(int apicid, int cpu)
|
|
/*
|
|
* NOTE - on most systems this is a PHYSICAL apic ID, but on multiquad
|
|
* (ie clustered apic addressing mode), this is a LOGICAL apic ID.
|
|
* Returns zero if CPU booted OK, else error code from wakeup_secondary_cpu.
|
|
*/
|
|
{
|
|
unsigned long boot_error = 0;
|
|
int timeout;
|
|
unsigned long start_eip;
|
|
unsigned short nmi_high = 0, nmi_low = 0;
|
|
struct create_idle c_idle = {
|
|
.cpu = cpu,
|
|
.done = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
|
|
};
|
|
INIT_WORK(&c_idle.work, do_fork_idle);
|
|
|
|
alternatives_smp_switch(1);
|
|
|
|
c_idle.idle = get_idle_for_cpu(cpu);
|
|
|
|
/*
|
|
* We can't use kernel_thread since we must avoid to
|
|
* reschedule the child.
|
|
*/
|
|
if (c_idle.idle) {
|
|
c_idle.idle->thread.sp = (unsigned long) (((struct pt_regs *)
|
|
(THREAD_SIZE + task_stack_page(c_idle.idle))) - 1);
|
|
init_idle(c_idle.idle, cpu);
|
|
goto do_rest;
|
|
}
|
|
|
|
if (!keventd_up() || current_is_keventd())
|
|
c_idle.work.func(&c_idle.work);
|
|
else {
|
|
schedule_work(&c_idle.work);
|
|
wait_for_completion(&c_idle.done);
|
|
}
|
|
|
|
if (IS_ERR(c_idle.idle)) {
|
|
printk(KERN_ERR "failed fork for CPU %d\n", cpu);
|
|
return PTR_ERR(c_idle.idle);
|
|
}
|
|
|
|
set_idle_for_cpu(cpu, c_idle.idle);
|
|
do_rest:
|
|
per_cpu(current_task, cpu) = c_idle.idle;
|
|
init_gdt(cpu);
|
|
early_gdt_descr.address = (unsigned long)get_cpu_gdt_table(cpu);
|
|
|
|
c_idle.idle->thread.ip = (unsigned long) start_secondary;
|
|
/* start_eip had better be page-aligned! */
|
|
start_eip = setup_trampoline();
|
|
|
|
/* So we see what's up */
|
|
printk("Booting processor %d/%d ip %lx\n", cpu, apicid, start_eip);
|
|
/* Stack for startup_32 can be just as for start_secondary onwards */
|
|
stack_start.sp = (void *) c_idle.idle->thread.sp;
|
|
|
|
irq_ctx_init(cpu);
|
|
|
|
/*
|
|
* This grunge runs the startup process for
|
|
* the targeted processor.
|
|
*/
|
|
|
|
atomic_set(&init_deasserted, 0);
|
|
|
|
Dprintk("Setting warm reset code and vector.\n");
|
|
|
|
store_NMI_vector(&nmi_high, &nmi_low);
|
|
|
|
smpboot_setup_warm_reset_vector(start_eip);
|
|
/*
|
|
* Be paranoid about clearing APIC errors.
|
|
*/
|
|
apic_write(APIC_ESR, 0);
|
|
apic_read(APIC_ESR);
|
|
|
|
|
|
/*
|
|
* Starting actual IPI sequence...
|
|
*/
|
|
boot_error = wakeup_secondary_cpu(apicid, start_eip);
|
|
|
|
if (!boot_error) {
|
|
/*
|
|
* allow APs to start initializing.
|
|
*/
|
|
Dprintk("Before Callout %d.\n", cpu);
|
|
cpu_set(cpu, cpu_callout_map);
|
|
Dprintk("After Callout %d.\n", cpu);
|
|
|
|
/*
|
|
* Wait 5s total for a response
|
|
*/
|
|
for (timeout = 0; timeout < 50000; timeout++) {
|
|
if (cpu_isset(cpu, cpu_callin_map))
|
|
break; /* It has booted */
|
|
udelay(100);
|
|
}
|
|
|
|
if (cpu_isset(cpu, cpu_callin_map)) {
|
|
/* number CPUs logically, starting from 1 (BSP is 0) */
|
|
Dprintk("OK.\n");
|
|
printk("CPU%d: ", cpu);
|
|
print_cpu_info(&cpu_data(cpu));
|
|
Dprintk("CPU has booted.\n");
|
|
} else {
|
|
boot_error= 1;
|
|
if (*((volatile unsigned char *)trampoline_base)
|
|
== 0xA5)
|
|
/* trampoline started but...? */
|
|
printk("Stuck ??\n");
|
|
else
|
|
/* trampoline code not run */
|
|
printk("Not responding.\n");
|
|
inquire_remote_apic(apicid);
|
|
}
|
|
}
|
|
|
|
if (boot_error) {
|
|
/* Try to put things back the way they were before ... */
|
|
unmap_cpu_to_logical_apicid(cpu);
|
|
cpu_clear(cpu, cpu_callout_map); /* was set here (do_boot_cpu()) */
|
|
cpu_clear(cpu, cpu_initialized); /* was set by cpu_init() */
|
|
cpu_clear(cpu, cpu_possible_map);
|
|
per_cpu(x86_cpu_to_apicid, cpu) = BAD_APICID;
|
|
}
|
|
|
|
/* mark "stuck" area as not stuck */
|
|
*((volatile unsigned long *)trampoline_base) = 0;
|
|
|
|
return boot_error;
|
|
}
|
|
|
|
#ifdef CONFIG_HOTPLUG_CPU
|
|
void cpu_exit_clear(void)
|
|
{
|
|
int cpu = raw_smp_processor_id();
|
|
|
|
idle_task_exit();
|
|
|
|
cpu_uninit();
|
|
irq_ctx_exit(cpu);
|
|
|
|
cpu_clear(cpu, cpu_callout_map);
|
|
cpu_clear(cpu, cpu_callin_map);
|
|
|
|
unmap_cpu_to_logical_apicid(cpu);
|
|
}
|
|
#endif
|
|
|
|
static int boot_cpu_logical_apicid;
|
|
/* Where the IO area was mapped on multiquad, always 0 otherwise */
|
|
void *xquad_portio;
|
|
#ifdef CONFIG_X86_NUMAQ
|
|
EXPORT_SYMBOL(xquad_portio);
|
|
#endif
|
|
|
|
static void __init disable_smp(void)
|
|
{
|
|
cpu_possible_map = cpumask_of_cpu(0);
|
|
cpu_present_map = cpumask_of_cpu(0);
|
|
smpboot_clear_io_apic_irqs();
|
|
phys_cpu_present_map = physid_mask_of_physid(0);
|
|
map_cpu_to_logical_apicid();
|
|
cpu_set(0, per_cpu(cpu_sibling_map, 0));
|
|
cpu_set(0, per_cpu(cpu_core_map, 0));
|
|
}
|
|
|
|
static int __init smp_sanity_check(unsigned max_cpus)
|
|
{
|
|
/*
|
|
* If we couldn't find an SMP configuration at boot time,
|
|
* get out of here now!
|
|
*/
|
|
if (!smp_found_config && !acpi_lapic) {
|
|
printk(KERN_NOTICE "SMP motherboard not detected.\n");
|
|
disable_smp();
|
|
if (APIC_init_uniprocessor())
|
|
printk(KERN_NOTICE "Local APIC not detected."
|
|
" Using dummy APIC emulation.\n");
|
|
return -1;
|
|
}
|
|
|
|
/*
|
|
* Should not be necessary because the MP table should list the boot
|
|
* CPU too, but we do it for the sake of robustness anyway.
|
|
* Makes no sense to do this check in clustered apic mode, so skip it
|
|
*/
|
|
if (!check_phys_apicid_present(boot_cpu_physical_apicid)) {
|
|
printk("weird, boot CPU (#%d) not listed by the BIOS.\n",
|
|
boot_cpu_physical_apicid);
|
|
physid_set(hard_smp_processor_id(), phys_cpu_present_map);
|
|
}
|
|
|
|
/*
|
|
* If we couldn't find a local APIC, then get out of here now!
|
|
*/
|
|
if (APIC_INTEGRATED(apic_version[boot_cpu_physical_apicid]) && !cpu_has_apic) {
|
|
printk(KERN_ERR "BIOS bug, local APIC #%d not detected!...\n",
|
|
boot_cpu_physical_apicid);
|
|
printk(KERN_ERR "... forcing use of dummy APIC emulation. (tell your hw vendor)\n");
|
|
return -1;
|
|
}
|
|
|
|
verify_local_APIC();
|
|
|
|
/*
|
|
* If SMP should be disabled, then really disable it!
|
|
*/
|
|
if (!max_cpus) {
|
|
smp_found_config = 0;
|
|
printk(KERN_INFO "SMP mode deactivated, forcing use of dummy APIC emulation.\n");
|
|
|
|
if (nmi_watchdog == NMI_LOCAL_APIC) {
|
|
printk(KERN_INFO "activating minimal APIC for NMI watchdog use.\n");
|
|
connect_bsp_APIC();
|
|
setup_local_APIC();
|
|
end_local_APIC_setup();
|
|
}
|
|
return -1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Cycle through the processors sending APIC IPIs to boot each.
|
|
*/
|
|
static void __init smp_boot_cpus(unsigned int max_cpus)
|
|
{
|
|
/*
|
|
* Setup boot CPU information
|
|
*/
|
|
smp_store_cpu_info(0); /* Final full version of the data */
|
|
printk(KERN_INFO "CPU%d: ", 0);
|
|
print_cpu_info(&cpu_data(0));
|
|
|
|
boot_cpu_physical_apicid = GET_APIC_ID(apic_read(APIC_ID));
|
|
boot_cpu_logical_apicid = logical_smp_processor_id();
|
|
|
|
current_thread_info()->cpu = 0;
|
|
|
|
set_cpu_sibling_map(0);
|
|
|
|
if (smp_sanity_check(max_cpus) < 0) {
|
|
printk(KERN_INFO "SMP disabled\n");
|
|
disable_smp();
|
|
return;
|
|
}
|
|
|
|
connect_bsp_APIC();
|
|
setup_local_APIC();
|
|
end_local_APIC_setup();
|
|
map_cpu_to_logical_apicid();
|
|
|
|
|
|
setup_portio_remap();
|
|
|
|
smpboot_setup_io_apic();
|
|
|
|
setup_boot_clock();
|
|
}
|
|
|
|
/* These are wrappers to interface to the new boot process. Someone
|
|
who understands all this stuff should rewrite it properly. --RR 15/Jul/02 */
|
|
void __init native_smp_prepare_cpus(unsigned int max_cpus)
|
|
{
|
|
nmi_watchdog_default();
|
|
cpu_callin_map = cpumask_of_cpu(0);
|
|
mb();
|
|
smp_boot_cpus(max_cpus);
|
|
}
|
|
|
|
void __init native_smp_prepare_boot_cpu(void)
|
|
{
|
|
unsigned int cpu = smp_processor_id();
|
|
|
|
init_gdt(cpu);
|
|
switch_to_new_gdt();
|
|
|
|
cpu_set(cpu, cpu_callout_map);
|
|
__get_cpu_var(cpu_state) = CPU_ONLINE;
|
|
}
|
|
|
|
int __cpuinit native_cpu_up(unsigned int cpu)
|
|
{
|
|
int apicid = cpu_present_to_apicid(cpu);
|
|
unsigned long flags;
|
|
|
|
WARN_ON(irqs_disabled());
|
|
|
|
Dprintk("++++++++++++++++++++=_---CPU UP %u\n", cpu);
|
|
|
|
if (apicid == BAD_APICID || apicid == boot_cpu_physical_apicid ||
|
|
!physid_isset(apicid, phys_cpu_present_map)) {
|
|
printk(KERN_ERR "%s: bad cpu %d\n", __func__, cpu);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/*
|
|
* Save current MTRR state in case it was changed since early boot
|
|
* (e.g. by the ACPI SMI) to initialize new CPUs with MTRRs in sync:
|
|
*/
|
|
mtrr_save_state();
|
|
|
|
per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
|
|
|
|
/* init low mem mapping */
|
|
clone_pgd_range(swapper_pg_dir, swapper_pg_dir + USER_PGD_PTRS,
|
|
min_t(unsigned long, KERNEL_PGD_PTRS, USER_PGD_PTRS));
|
|
flush_tlb_all();
|
|
|
|
do_boot_cpu(apicid, cpu);
|
|
|
|
/* In case one didn't come up */
|
|
if (!cpu_isset(cpu, cpu_callin_map)) {
|
|
printk(KERN_DEBUG "skipping cpu%d, didn't come online\n", cpu);
|
|
return -EIO;
|
|
}
|
|
|
|
|
|
/*
|
|
* Check TSC synchronization with the AP (keep irqs disabled
|
|
* while doing so):
|
|
*/
|
|
local_irq_save(flags);
|
|
check_tsc_sync_source(cpu);
|
|
local_irq_restore(flags);
|
|
|
|
while (!cpu_isset(cpu, cpu_online_map)) {
|
|
cpu_relax();
|
|
touch_nmi_watchdog();
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
extern void impress_friends(void);
|
|
extern void smp_checks(void);
|
|
|
|
void __init native_smp_cpus_done(unsigned int max_cpus)
|
|
{
|
|
/*
|
|
* Cleanup possible dangling ends...
|
|
*/
|
|
smpboot_restore_warm_reset_vector();
|
|
|
|
Dprintk("Boot done.\n");
|
|
|
|
impress_friends();
|
|
smp_checks();
|
|
#ifdef CONFIG_X86_IO_APIC
|
|
setup_ioapic_dest();
|
|
#endif
|
|
check_nmi_watchdog();
|
|
zap_low_mappings();
|
|
}
|