ccb43646ed
Removed some obsolete definitions and one unused variable. Signed-off-by: Oliver Endriss <o.endriss@gmx.de> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
494 lines
12 KiB
C
494 lines
12 KiB
C
#ifndef _AV7110_HW_H_
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#define _AV7110_HW_H_
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#include "av7110.h"
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/* DEBI transfer mode defs */
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#define DEBINOSWAP 0x000e0000
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#define DEBISWAB 0x001e0000
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#define DEBISWAP 0x002e0000
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#define ARM_WAIT_FREE (HZ)
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#define ARM_WAIT_SHAKE (HZ/5)
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#define ARM_WAIT_OSD (HZ)
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enum av7110_bootstate
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{
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BOOTSTATE_BUFFER_EMPTY = 0,
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BOOTSTATE_BUFFER_FULL = 1,
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BOOTSTATE_AV7110_BOOT_COMPLETE = 2
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};
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enum av7110_type_rec_play_format
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{ RP_None,
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AudioPES,
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AudioMp2,
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AudioPCM,
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VideoPES,
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AV_PES
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};
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enum av7110_osd_palette_type
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{
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NoPalet = 0, /* No palette */
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Pal1Bit = 2, /* 2 colors for 1 Bit Palette */
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Pal2Bit = 4, /* 4 colors for 2 bit palette */
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Pal4Bit = 16, /* 16 colors for 4 bit palette */
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Pal8Bit = 256 /* 256 colors for 16 bit palette */
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};
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/* switch defines */
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#define SB_GPIO 3
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#define SB_OFF SAA7146_GPIO_OUTLO /* SlowBlank off (TV-Mode) */
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#define SB_ON SAA7146_GPIO_INPUT /* SlowBlank on (AV-Mode) */
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#define SB_WIDE SAA7146_GPIO_OUTHI /* SlowBlank 6V (16/9-Mode) (not implemented) */
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#define FB_GPIO 1
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#define FB_OFF SAA7146_GPIO_LO /* FastBlank off (CVBS-Mode) */
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#define FB_ON SAA7146_GPIO_OUTHI /* FastBlank on (RGB-Mode) */
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#define FB_LOOP SAA7146_GPIO_INPUT /* FastBlank loop-through (PC graphics ???) */
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enum av7110_video_output_mode
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{
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NO_OUT = 0, /* disable analog output */
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CVBS_RGB_OUT = 1,
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CVBS_YC_OUT = 2,
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YC_OUT = 3
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};
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/* firmware internal msg q status: */
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#define GPMQFull 0x0001 /* Main Message Queue Full */
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#define GPMQOver 0x0002 /* Main Message Queue Overflow */
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#define HPQFull 0x0004 /* High Priority Msg Queue Full */
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#define HPQOver 0x0008
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#define OSDQFull 0x0010 /* OSD Queue Full */
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#define OSDQOver 0x0020
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#define GPMQBusy 0x0040 /* Queue not empty, FW >= 261d */
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#define HPQBusy 0x0080
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#define OSDQBusy 0x0100
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/* hw section filter flags */
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#define SECTION_EIT 0x01
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#define SECTION_SINGLE 0x00
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#define SECTION_CYCLE 0x02
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#define SECTION_CONTINUOS 0x04
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#define SECTION_MODE 0x06
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#define SECTION_IPMPE 0x0C /* size up to 4k */
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#define SECTION_HIGH_SPEED 0x1C /* larger buffer */
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#define DATA_PIPING_FLAG 0x20 /* for Data Piping Filter */
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#define PBUFSIZE_NONE 0x0000
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#define PBUFSIZE_1P 0x0100
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#define PBUFSIZE_2P 0x0200
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#define PBUFSIZE_1K 0x0300
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#define PBUFSIZE_2K 0x0400
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#define PBUFSIZE_4K 0x0500
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#define PBUFSIZE_8K 0x0600
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#define PBUFSIZE_16K 0x0700
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#define PBUFSIZE_32K 0x0800
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/* firmware command codes */
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enum av7110_osd_command {
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WCreate,
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WDestroy,
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WMoveD,
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WMoveA,
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WHide,
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WTop,
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DBox,
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DLine,
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DText,
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Set_Font,
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SetColor,
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SetBlend,
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SetWBlend,
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SetCBlend,
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SetNonBlend,
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LoadBmp,
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BlitBmp,
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ReleaseBmp,
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SetWTrans,
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SetWNoTrans,
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Set_Palette
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};
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enum av7110_pid_command {
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MultiPID,
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VideoPID,
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AudioPID,
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InitFilt,
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FiltError,
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NewVersion,
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CacheError,
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AddPIDFilter,
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DelPIDFilter,
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Scan,
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SetDescr,
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SetIR,
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FlushTSQueue
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};
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enum av7110_mpeg_command {
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SelAudChannels
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};
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enum av7110_audio_command {
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AudioDAC,
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CabADAC,
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ON22K,
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OFF22K,
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MainSwitch,
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ADSwitch,
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SendDiSEqC,
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SetRegister,
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SpdifSwitch
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};
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enum av7110_request_command {
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AudioState,
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AudioBuffState,
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VideoState1,
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VideoState2,
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VideoState3,
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CrashCounter,
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ReqVersion,
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ReqVCXO,
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ReqRegister,
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ReqSecFilterError,
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ReqSTC
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};
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enum av7110_encoder_command {
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SetVidMode,
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SetTestMode,
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LoadVidCode,
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SetMonitorType,
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SetPanScanType,
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SetFreezeMode,
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SetWSSConfig
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};
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enum av7110_rec_play_state {
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__Record,
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__Stop,
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__Play,
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__Pause,
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__Slow,
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__FF_IP,
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__Scan_I,
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__Continue
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};
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enum av7110_fw_cmd_misc {
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AV7110_FW_VIDEO_ZOOM = 1,
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AV7110_FW_VIDEO_COMMAND,
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AV7110_FW_AUDIO_COMMAND
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};
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enum av7110_command_type {
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COMTYPE_NOCOM,
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COMTYPE_PIDFILTER,
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COMTYPE_MPEGDECODER,
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COMTYPE_OSD,
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COMTYPE_BMP,
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COMTYPE_ENCODER,
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COMTYPE_AUDIODAC,
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COMTYPE_REQUEST,
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COMTYPE_SYSTEM,
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COMTYPE_REC_PLAY,
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COMTYPE_COMMON_IF,
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COMTYPE_PID_FILTER,
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COMTYPE_PES,
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COMTYPE_TS,
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COMTYPE_VIDEO,
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COMTYPE_AUDIO,
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COMTYPE_CI_LL,
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COMTYPE_MISC = 0x80
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};
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#define VID_NONE_PREF 0x00 /* No aspect ration processing preferred */
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#define VID_PAN_SCAN_PREF 0x01 /* Pan and Scan Display preferred */
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#define VID_VERT_COMP_PREF 0x02 /* Vertical compression display preferred */
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#define VID_VC_AND_PS_PREF 0x03 /* PanScan and vertical Compression if allowed */
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#define VID_CENTRE_CUT_PREF 0x05 /* PanScan with zero vector */
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/* MPEG video decoder commands */
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#define AV_VIDEO_CMD_STOP 0x000e
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#define AV_VIDEO_CMD_PLAY 0x000d
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#define AV_VIDEO_CMD_FREEZE 0x0102
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#define AV_VIDEO_CMD_FFWD 0x0016
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#define AV_VIDEO_CMD_SLOW 0x0022
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/* MPEG audio decoder commands */
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#define AUDIO_CMD_MUTE 0x0001
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#define AUDIO_CMD_UNMUTE 0x0002
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#define AUDIO_CMD_PCM16 0x0010
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#define AUDIO_CMD_STEREO 0x0080
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#define AUDIO_CMD_MONO_L 0x0100
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#define AUDIO_CMD_MONO_R 0x0200
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#define AUDIO_CMD_SYNC_OFF 0x000e
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#define AUDIO_CMD_SYNC_ON 0x000f
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/* firmware data interface codes */
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#define DATA_NONE 0x00
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#define DATA_FSECTION 0x01
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#define DATA_IPMPE 0x02
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#define DATA_MPEG_RECORD 0x03
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#define DATA_DEBUG_MESSAGE 0x04
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#define DATA_COMMON_INTERFACE 0x05
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#define DATA_MPEG_PLAY 0x06
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#define DATA_BMP_LOAD 0x07
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#define DATA_IRCOMMAND 0x08
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#define DATA_PIPING 0x09
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#define DATA_STREAMING 0x0a
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#define DATA_CI_GET 0x0b
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#define DATA_CI_PUT 0x0c
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#define DATA_MPEG_VIDEO_EVENT 0x0d
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#define DATA_PES_RECORD 0x10
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#define DATA_PES_PLAY 0x11
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#define DATA_TS_RECORD 0x12
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#define DATA_TS_PLAY 0x13
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/* ancient CI command codes, only two are actually still used
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* by the link level CI firmware */
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#define CI_CMD_ERROR 0x00
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#define CI_CMD_ACK 0x01
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#define CI_CMD_SYSTEM_READY 0x02
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#define CI_CMD_KEYPRESS 0x03
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#define CI_CMD_ON_TUNED 0x04
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#define CI_CMD_ON_SWITCH_PROGRAM 0x05
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#define CI_CMD_SECTION_ARRIVED 0x06
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#define CI_CMD_SECTION_TIMEOUT 0x07
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#define CI_CMD_TIME 0x08
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#define CI_CMD_ENTER_MENU 0x09
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#define CI_CMD_FAST_PSI 0x0a
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#define CI_CMD_GET_SLOT_INFO 0x0b
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#define CI_MSG_NONE 0x00
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#define CI_MSG_CI_INFO 0x01
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#define CI_MSG_MENU 0x02
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#define CI_MSG_LIST 0x03
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#define CI_MSG_TEXT 0x04
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#define CI_MSG_REQUEST_INPUT 0x05
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#define CI_MSG_INPUT_COMPLETE 0x06
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#define CI_MSG_LIST_MORE 0x07
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#define CI_MSG_MENU_MORE 0x08
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#define CI_MSG_CLOSE_MMI_IMM 0x09
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#define CI_MSG_SECTION_REQUEST 0x0a
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#define CI_MSG_CLOSE_FILTER 0x0b
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#define CI_PSI_COMPLETE 0x0c
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#define CI_MODULE_READY 0x0d
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#define CI_SWITCH_PRG_REPLY 0x0e
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#define CI_MSG_TEXT_MORE 0x0f
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#define CI_MSG_CA_PMT 0xe0
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#define CI_MSG_ERROR 0xf0
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/* base address of the dual ported RAM which serves as communication
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* area between PCI bus and av7110,
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* as seen by the DEBI bus of the saa7146 */
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#define DPRAM_BASE 0x4000
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/* boot protocol area */
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#define AV7110_BOOT_STATE (DPRAM_BASE + 0x3F8)
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#define AV7110_BOOT_SIZE (DPRAM_BASE + 0x3FA)
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#define AV7110_BOOT_BASE (DPRAM_BASE + 0x3FC)
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#define AV7110_BOOT_BLOCK (DPRAM_BASE + 0x400)
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#define AV7110_BOOT_MAX_SIZE 0xc00
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/* firmware command protocol area */
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#define IRQ_STATE (DPRAM_BASE + 0x0F4)
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#define IRQ_STATE_EXT (DPRAM_BASE + 0x0F6)
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#define MSGSTATE (DPRAM_BASE + 0x0F8)
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#define COMMAND (DPRAM_BASE + 0x0FC)
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#define COM_BUFF (DPRAM_BASE + 0x100)
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#define COM_BUFF_SIZE 0x20
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/* various data buffers */
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#define BUFF1_BASE (DPRAM_BASE + 0x120)
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#define BUFF1_SIZE 0xE0
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#define DATA_BUFF0_BASE (DPRAM_BASE + 0x200)
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#define DATA_BUFF0_SIZE 0x0800
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#define DATA_BUFF1_BASE (DATA_BUFF0_BASE+DATA_BUFF0_SIZE)
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#define DATA_BUFF1_SIZE 0x0800
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#define DATA_BUFF2_BASE (DATA_BUFF1_BASE+DATA_BUFF1_SIZE)
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#define DATA_BUFF2_SIZE 0x0800
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#define DATA_BUFF3_BASE (DATA_BUFF2_BASE+DATA_BUFF2_SIZE)
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#define DATA_BUFF3_SIZE 0x0400
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#define Reserved (DPRAM_BASE + 0x1E00)
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#define Reserved_SIZE 0x1C0
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/* firmware status area */
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#define STATUS_BASE (DPRAM_BASE + 0x1FC0)
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#define STATUS_LOOPS (STATUS_BASE + 0x08)
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#define STATUS_MPEG_WIDTH (STATUS_BASE + 0x0C)
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/* ((aspect_ratio & 0xf) << 12) | (height & 0xfff) */
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#define STATUS_MPEG_HEIGHT_AR (STATUS_BASE + 0x0E)
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/* firmware data protocol area */
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#define RX_TYPE (DPRAM_BASE + 0x1FE8)
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#define RX_LEN (DPRAM_BASE + 0x1FEA)
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#define TX_TYPE (DPRAM_BASE + 0x1FEC)
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#define TX_LEN (DPRAM_BASE + 0x1FEE)
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#define RX_BUFF (DPRAM_BASE + 0x1FF4)
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#define TX_BUFF (DPRAM_BASE + 0x1FF6)
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#define HANDSHAKE_REG (DPRAM_BASE + 0x1FF8)
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#define COM_IF_LOCK (DPRAM_BASE + 0x1FFA)
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#define IRQ_RX (DPRAM_BASE + 0x1FFC)
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#define IRQ_TX (DPRAM_BASE + 0x1FFE)
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/* used by boot protocol to load firmware into av7110 DRAM */
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#define DRAM_START_CODE 0x2e000404
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#define DRAM_MAX_CODE_SIZE 0x00100000
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/* saa7146 gpio lines */
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#define RESET_LINE 2
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#define DEBI_DONE_LINE 1
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#define ARM_IRQ_LINE 0
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extern int av7110_bootarm(struct av7110 *av7110);
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extern int av7110_firmversion(struct av7110 *av7110);
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#define FW_CI_LL_SUPPORT(arm_app) ((arm_app) & 0x80000000)
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#define FW_4M_SDRAM(arm_app) ((arm_app) & 0x40000000)
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#define FW_VERSION(arm_app) ((arm_app) & 0x0000FFFF)
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extern int av7110_wait_msgstate(struct av7110 *av7110, u16 flags);
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extern int av7110_fw_cmd(struct av7110 *av7110, int type, int com, int num, ...);
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extern int av7110_fw_request(struct av7110 *av7110, u16 *request_buf,
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int request_buf_len, u16 *reply_buf, int reply_buf_len);
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/* DEBI (saa7146 data extension bus interface) access */
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extern int av7110_debiwrite(struct av7110 *av7110, u32 config,
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int addr, u32 val, int count);
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extern u32 av7110_debiread(struct av7110 *av7110, u32 config,
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int addr, int count);
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/* DEBI during interrupt */
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/* single word writes */
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static inline void iwdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)
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{
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av7110_debiwrite(av7110, config, addr, val, count);
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}
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/* buffer writes */
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static inline void mwdebi(struct av7110 *av7110, u32 config, int addr, u8 *val, int count)
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{
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memcpy(av7110->debi_virt, val, count);
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av7110_debiwrite(av7110, config, addr, 0, count);
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}
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static inline u32 irdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)
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{
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u32 res;
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res=av7110_debiread(av7110, config, addr, count);
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if (count<=4)
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memcpy(av7110->debi_virt, (char *) &res, count);
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return res;
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}
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/* DEBI outside interrupts, only for count <= 4! */
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static inline void wdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)
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{
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unsigned long flags;
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spin_lock_irqsave(&av7110->debilock, flags);
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av7110_debiwrite(av7110, config, addr, val, count);
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spin_unlock_irqrestore(&av7110->debilock, flags);
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}
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static inline u32 rdebi(struct av7110 *av7110, u32 config, int addr, u32 val, int count)
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{
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unsigned long flags;
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u32 res;
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spin_lock_irqsave(&av7110->debilock, flags);
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res=av7110_debiread(av7110, config, addr, count);
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spin_unlock_irqrestore(&av7110->debilock, flags);
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return res;
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}
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/* handle mailbox registers of the dual ported RAM */
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static inline void ARM_ResetMailBox(struct av7110 *av7110)
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{
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unsigned long flags;
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spin_lock_irqsave(&av7110->debilock, flags);
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av7110_debiread(av7110, DEBINOSWAP, IRQ_RX, 2);
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av7110_debiwrite(av7110, DEBINOSWAP, IRQ_RX, 0, 2);
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spin_unlock_irqrestore(&av7110->debilock, flags);
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}
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static inline void ARM_ClearMailBox(struct av7110 *av7110)
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{
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iwdebi(av7110, DEBINOSWAP, IRQ_RX, 0, 2);
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}
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static inline void ARM_ClearIrq(struct av7110 *av7110)
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{
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irdebi(av7110, DEBINOSWAP, IRQ_RX, 0, 2);
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}
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/****************************************************************************
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* Firmware commands
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****************************************************************************/
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static inline int SendDAC(struct av7110 *av7110, u8 addr, u8 data)
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{
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return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, AudioDAC, 2, addr, data);
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}
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static inline int av7710_set_video_mode(struct av7110 *av7110, int mode)
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{
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return av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetVidMode, 1, mode);
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}
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static inline int vidcom(struct av7110 *av7110, u32 com, u32 arg)
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{
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return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_VIDEO_COMMAND, 4,
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(com>>16), (com&0xffff),
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(arg>>16), (arg&0xffff));
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}
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static inline int audcom(struct av7110 *av7110, u32 com)
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{
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return av7110_fw_cmd(av7110, COMTYPE_MISC, AV7110_FW_AUDIO_COMMAND, 2,
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(com>>16), (com&0xffff));
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}
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static inline int Set22K(struct av7110 *av7110, int state)
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{
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return av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, (state ? ON22K : OFF22K), 0);
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}
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extern int av7110_diseqc_send(struct av7110 *av7110, int len, u8 *msg, unsigned long burst);
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#ifdef CONFIG_DVB_AV7110_OSD
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extern int av7110_osd_cmd(struct av7110 *av7110, osd_cmd_t *dc);
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extern int av7110_osd_capability(struct av7110 *av7110, osd_cap_t *cap);
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#endif /* CONFIG_DVB_AV7110_OSD */
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#endif /* _AV7110_HW_H_ */
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