kernel-fxtec-pro1x/arch/mn10300/mm
Akira Takeuchi 965ea4bbb9 MN10300: SMP TLB flushing
Implement global TLB flushing for MN10300.  This will be used by the AM34 which
is SMP capable.

Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
2010-10-27 17:28:51 +01:00
..
cache-disabled.c
cache-flush-by-reg.S
cache-flush-by-tag.S
cache-flush-icache.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-inv-by-reg.S
cache-inv-by-tag.S
cache-inv-icache.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp-flush.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp-inv.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache-smp.h MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
cache.c MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
dma-alloc.c
extable.c
fault.c MN10300: Remove monitor/JTAG functions 2010-10-27 17:28:41 +01:00
init.c MN10300: Rename __flush_tlb*() to local_flush_tlb*() 2010-10-27 17:28:49 +01:00
Kconfig.cache MN10300: Cache: Implement SMP global cache flushing 2010-10-27 17:28:47 +01:00
Makefile MN10300: SMP TLB flushing 2010-10-27 17:28:51 +01:00
misalignment.c
mmu-context.c MN10300: Make the use of PIDR to mark TLB entries controllable 2010-10-27 17:28:49 +01:00
pgtable.c MN10300: Rename __flush_tlb*() to local_flush_tlb*() 2010-10-27 17:28:49 +01:00
tlb-mn10300.S MN10300: Use the [ID]PTEL2 registers rather than [ID]PTEL for TLB control 2010-10-27 17:28:50 +01:00
tlb-smp.c MN10300: SMP TLB flushing 2010-10-27 17:28:51 +01:00