03a6d28cdd
The orig platform code orgnaization was singleton design pattern - only one platform (and board thereof) would build at a time. Thus any platform/board specific code (e.g. irq init, early init ...) expected by ARC common code was exported as well defined set of APIs, with only ONE instance building ever. Now with multiple-platform build requirement, that design of code no longer holds - multiple board specific calls need to build at the same time - so ARC common code can't use the API approach, it needs a callback based design where each board registers it's specific set of functions, and at runtime, depending on board detection, the callbacks are used from the registry. This commit adds all the infrastructure, where board specific callbacks are specified as a "maThine description". All the hooks are placed in right spots, no board callbacks registered yet (with MACHINE_STARt/END constructs) so the hooks will not run. Next commit will actually convert the platform to this infrastructure. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Arnd Bergmann <arnd@arndb.de> Acked-by: Arnd Bergmann <arnd@arndb.de>
476 lines
12 KiB
C
476 lines
12 KiB
C
/*
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* Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/seq_file.h>
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#include <linux/fs.h>
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#include <linux/delay.h>
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#include <linux/root_dev.h>
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#include <linux/console.h>
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#include <linux/module.h>
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#include <linux/cpu.h>
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#include <linux/of_fdt.h>
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#include <asm/sections.h>
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#include <asm/arcregs.h>
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#include <asm/tlb.h>
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#include <asm/cache.h>
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#include <asm/setup.h>
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#include <asm/page.h>
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#include <asm/irq.h>
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#include <asm/arcregs.h>
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#include <asm/prom.h>
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#include <asm/unwind.h>
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#include <asm/clk.h>
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#include <asm/mach_desc.h>
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#define FIX_PTR(x) __asm__ __volatile__(";" : "+r"(x))
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int running_on_hw = 1; /* vs. on ISS */
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char __initdata command_line[COMMAND_LINE_SIZE];
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struct machine_desc *machine_desc __initdata;
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struct task_struct *_current_task[NR_CPUS]; /* For stack switching */
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struct cpuinfo_arc cpuinfo_arc700[NR_CPUS];
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void __init read_arc_build_cfg_regs(void)
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{
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struct bcr_perip uncached_space;
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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FIX_PTR(cpu);
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READ_BCR(AUX_IDENTITY, cpu->core);
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cpu->timers = read_aux_reg(ARC_REG_TIMERS_BCR);
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cpu->vec_base = read_aux_reg(AUX_INTR_VEC_BASE);
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if (cpu->vec_base == 0)
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cpu->vec_base = (unsigned int)_int_vec_base_lds;
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READ_BCR(ARC_REG_D_UNCACH_BCR, uncached_space);
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cpu->uncached_base = uncached_space.start << 24;
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cpu->extn.mul = read_aux_reg(ARC_REG_MUL_BCR);
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cpu->extn.swap = read_aux_reg(ARC_REG_SWAP_BCR);
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cpu->extn.norm = read_aux_reg(ARC_REG_NORM_BCR);
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cpu->extn.minmax = read_aux_reg(ARC_REG_MIXMAX_BCR);
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cpu->extn.barrel = read_aux_reg(ARC_REG_BARREL_BCR);
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READ_BCR(ARC_REG_MAC_BCR, cpu->extn_mac_mul);
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cpu->extn.ext_arith = read_aux_reg(ARC_REG_EXTARITH_BCR);
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cpu->extn.crc = read_aux_reg(ARC_REG_CRC_BCR);
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/* Note that we read the CCM BCRs independent of kernel config
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* This is to catch the cases where user doesn't know that
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* CCMs are present in hardware build
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*/
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{
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struct bcr_iccm iccm;
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struct bcr_dccm dccm;
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struct bcr_dccm_base dccm_base;
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unsigned int bcr_32bit_val;
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bcr_32bit_val = read_aux_reg(ARC_REG_ICCM_BCR);
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if (bcr_32bit_val) {
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iccm = *((struct bcr_iccm *)&bcr_32bit_val);
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cpu->iccm.base_addr = iccm.base << 16;
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cpu->iccm.sz = 0x2000 << (iccm.sz - 1);
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}
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bcr_32bit_val = read_aux_reg(ARC_REG_DCCM_BCR);
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if (bcr_32bit_val) {
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dccm = *((struct bcr_dccm *)&bcr_32bit_val);
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cpu->dccm.sz = 0x800 << (dccm.sz);
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READ_BCR(ARC_REG_DCCMBASE_BCR, dccm_base);
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cpu->dccm.base_addr = dccm_base.addr << 8;
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}
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}
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READ_BCR(ARC_REG_XY_MEM_BCR, cpu->extn_xymem);
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read_decode_mmu_bcr();
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read_decode_cache_bcr();
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READ_BCR(ARC_REG_FP_BCR, cpu->fp);
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READ_BCR(ARC_REG_DPFP_BCR, cpu->dpfp);
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}
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static const struct cpuinfo_data arc_cpu_tbl[] = {
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{ {0x10, "ARCTangent A5"}, 0x1F},
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{ {0x20, "ARC 600" }, 0x2F},
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{ {0x30, "ARC 700" }, 0x33},
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{ {0x34, "ARC 700 R4.10"}, 0x34},
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{ {0x00, NULL } }
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};
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char *arc_cpu_mumbojumbo(int cpu_id, char *buf, int len)
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{
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int n = 0;
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
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struct bcr_identity *core = &cpu->core;
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const struct cpuinfo_data *tbl;
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int be = 0;
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#ifdef CONFIG_CPU_BIG_ENDIAN
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be = 1;
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#endif
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FIX_PTR(cpu);
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n += scnprintf(buf + n, len - n,
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"\nARC IDENTITY\t: Family [%#02x]"
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" Cpu-id [%#02x] Chip-id [%#4x]\n",
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core->family, core->cpu_id,
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core->chip_id);
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for (tbl = &arc_cpu_tbl[0]; tbl->info.id != 0; tbl++) {
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if ((core->family >= tbl->info.id) &&
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(core->family <= tbl->up_range)) {
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n += scnprintf(buf + n, len - n,
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"processor\t: %s %s\n",
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tbl->info.str,
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be ? "[Big Endian]" : "");
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break;
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}
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}
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if (tbl->info.id == 0)
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n += scnprintf(buf + n, len - n, "UNKNOWN ARC Processor\n");
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n += scnprintf(buf + n, len - n, "CPU speed\t: %u.%02u Mhz\n",
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(unsigned int)(arc_get_core_freq() / 1000000),
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(unsigned int)(arc_get_core_freq() / 10000) % 100);
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n += scnprintf(buf + n, len - n, "Timers\t\t: %s %s\n",
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(cpu->timers & 0x200) ? "TIMER1" : "",
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(cpu->timers & 0x100) ? "TIMER0" : "");
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n += scnprintf(buf + n, len - n, "Vect Tbl Base\t: %#x\n",
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cpu->vec_base);
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n += scnprintf(buf + n, len - n, "UNCACHED Base\t: %#x\n",
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cpu->uncached_base);
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return buf;
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}
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static const struct id_to_str mul_type_nm[] = {
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{ 0x0, "N/A"},
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{ 0x1, "32x32 (spl Result Reg)" },
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{ 0x2, "32x32 (ANY Result Reg)" }
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};
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static const struct id_to_str mac_mul_nm[] = {
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{0x0, "N/A"},
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{0x1, "N/A"},
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{0x2, "Dual 16 x 16"},
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{0x3, "N/A"},
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{0x4, "32x16"},
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{0x5, "N/A"},
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{0x6, "Dual 16x16 and 32x16"}
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};
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char *arc_extn_mumbojumbo(int cpu_id, char *buf, int len)
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{
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int n = 0;
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[cpu_id];
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FIX_PTR(cpu);
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#define IS_AVAIL1(var, str) ((var) ? str : "")
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#define IS_AVAIL2(var, str) ((var == 0x2) ? str : "")
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#define IS_USED(var) ((var) ? "(in-use)" : "(not used)")
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n += scnprintf(buf + n, len - n,
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"Extn [700-Base]\t: %s %s %s %s %s %s\n",
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IS_AVAIL2(cpu->extn.norm, "norm,"),
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IS_AVAIL2(cpu->extn.barrel, "barrel-shift,"),
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IS_AVAIL1(cpu->extn.swap, "swap,"),
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IS_AVAIL2(cpu->extn.minmax, "minmax,"),
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IS_AVAIL1(cpu->extn.crc, "crc,"),
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IS_AVAIL2(cpu->extn.ext_arith, "ext-arith"));
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n += scnprintf(buf + n, len - n, "Extn [700-MPY]\t: %s",
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mul_type_nm[cpu->extn.mul].str);
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n += scnprintf(buf + n, len - n, " MAC MPY: %s\n",
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mac_mul_nm[cpu->extn_mac_mul.type].str);
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if (cpu->core.family == 0x34) {
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n += scnprintf(buf + n, len - n,
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"Extn [700-4.10]\t: LLOCK/SCOND %s, SWAPE %s, RTSC %s\n",
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IS_USED(__CONFIG_ARC_HAS_LLSC_VAL),
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IS_USED(__CONFIG_ARC_HAS_SWAPE_VAL),
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IS_USED(__CONFIG_ARC_HAS_RTSC_VAL));
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}
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n += scnprintf(buf + n, len - n, "Extn [CCM]\t: %s",
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!(cpu->dccm.sz || cpu->iccm.sz) ? "N/A" : "");
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if (cpu->dccm.sz)
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n += scnprintf(buf + n, len - n, "DCCM: @ %x, %d KB ",
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cpu->dccm.base_addr, TO_KB(cpu->dccm.sz));
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if (cpu->iccm.sz)
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n += scnprintf(buf + n, len - n, "ICCM: @ %x, %d KB",
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cpu->iccm.base_addr, TO_KB(cpu->iccm.sz));
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n += scnprintf(buf + n, len - n, "\nExtn [FPU]\t: %s",
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!(cpu->fp.ver || cpu->dpfp.ver) ? "N/A" : "");
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if (cpu->fp.ver)
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n += scnprintf(buf + n, len - n, "SP [v%d] %s",
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cpu->fp.ver, cpu->fp.fast ? "(fast)" : "");
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if (cpu->dpfp.ver)
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n += scnprintf(buf + n, len - n, "DP [v%d] %s",
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cpu->dpfp.ver, cpu->dpfp.fast ? "(fast)" : "");
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n += scnprintf(buf + n, len - n, "\n");
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#ifdef _ASM_GENERIC_UNISTD_H
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n += scnprintf(buf + n, len - n,
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"OS ABI [v2]\t: asm-generic/{unistd,stat,fcntl}\n");
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#endif
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return buf;
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}
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void __init arc_chk_ccms(void)
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{
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#if defined(CONFIG_ARC_HAS_DCCM) || defined(CONFIG_ARC_HAS_ICCM)
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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#ifdef CONFIG_ARC_HAS_DCCM
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/*
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* DCCM can be arbit placed in hardware.
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* Make sure it's placement/sz matches what Linux is built with
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*/
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if ((unsigned int)__arc_dccm_base != cpu->dccm.base_addr)
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panic("Linux built with incorrect DCCM Base address\n");
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if (CONFIG_ARC_DCCM_SZ != cpu->dccm.sz)
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panic("Linux built with incorrect DCCM Size\n");
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#endif
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#ifdef CONFIG_ARC_HAS_ICCM
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if (CONFIG_ARC_ICCM_SZ != cpu->iccm.sz)
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panic("Linux built with incorrect ICCM Size\n");
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#endif
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#endif
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}
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/*
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* Ensure that FP hardware and kernel config match
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* -If hardware contains DPFP, kernel needs to save/restore FPU state
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* across context switches
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* -If hardware lacks DPFP, but kernel configured to save FPU state then
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* kernel trying to access non-existant DPFP regs will crash
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*
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* We only check for Dbl precision Floating Point, because only DPFP
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* hardware has dedicated regs which need to be saved/restored on ctx-sw
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* (Single Precision uses core regs), thus kernel is kind of oblivious to it
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*/
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void __init arc_chk_fpu(void)
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{
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struct cpuinfo_arc *cpu = &cpuinfo_arc700[smp_processor_id()];
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if (cpu->dpfp.ver) {
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#ifndef CONFIG_ARC_FPU_SAVE_RESTORE
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pr_warn("DPFP support broken in this kernel...\n");
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#endif
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} else {
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#ifdef CONFIG_ARC_FPU_SAVE_RESTORE
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panic("H/w lacks DPFP support, apps won't work\n");
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#endif
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}
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}
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/*
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* Initialize and setup the processor core
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* This is called by all the CPUs thus should not do special case stuff
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* such as only for boot CPU etc
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*/
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void __init setup_processor(void)
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{
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char str[512];
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int cpu_id = smp_processor_id();
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read_arc_build_cfg_regs();
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arc_init_IRQ();
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printk(arc_cpu_mumbojumbo(cpu_id, str, sizeof(str)));
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arc_mmu_init();
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arc_cache_init();
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arc_chk_ccms();
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printk(arc_extn_mumbojumbo(cpu_id, str, sizeof(str)));
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#ifdef CONFIG_SMP
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printk(arc_platform_smp_cpuinfo());
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#endif
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arc_chk_fpu();
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}
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void __init __attribute__((weak)) arc_platform_early_init(void)
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{
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}
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void __init setup_arch(char **cmdline_p)
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{
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#ifdef CONFIG_CMDLINE_UBOOT
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/* Make sure that a whitespace is inserted before */
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strlcat(command_line, " ", sizeof(command_line));
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#endif
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/*
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* Append .config cmdline to base command line, which might already
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* contain u-boot "bootargs" (handled by head.S, if so configured)
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*/
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strlcat(command_line, CONFIG_CMDLINE, sizeof(command_line));
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/* Save unparsed command line copy for /proc/cmdline */
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strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
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*cmdline_p = command_line;
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machine_desc = setup_machine_fdt(__dtb_start);
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if (!machine_desc)
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panic("Embedded DT invalid\n");
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/* To force early parsing of things like mem=xxx */
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parse_early_param();
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/* Platform/board specific: e.g. early console registration */
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arc_platform_early_init();
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if (machine_desc->init_early)
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machine_desc->init_early();
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setup_processor();
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#ifdef CONFIG_SMP
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smp_init_cpus();
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#endif
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setup_arch_memory();
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unflatten_device_tree();
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/* Can be issue if someone passes cmd line arg "ro"
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* But that is unlikely so keeping it as it is
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*/
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root_mountflags &= ~MS_RDONLY;
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console_verbose();
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#if defined(CONFIG_VT) && defined(CONFIG_DUMMY_CONSOLE)
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conswitchp = &dummy_con;
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#endif
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arc_unwind_init();
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arc_unwind_setup();
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}
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static int __init customize_machine(void)
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{
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/* Add platform devices */
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if (machine_desc->init_machine)
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machine_desc->init_machine();
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return 0;
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}
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arch_initcall(customize_machine);
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static int __init init_late_machine(void)
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{
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if (machine_desc->init_late)
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machine_desc->init_late();
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return 0;
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}
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late_initcall(init_late_machine);
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/*
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* Get CPU information for use by the procfs.
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*/
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#define cpu_to_ptr(c) ((void *)(0xFFFF0000 | (unsigned int)(c)))
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#define ptr_to_cpu(p) (~0xFFFF0000UL & (unsigned int)(p))
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static int show_cpuinfo(struct seq_file *m, void *v)
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{
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char *str;
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int cpu_id = ptr_to_cpu(v);
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str = (char *)__get_free_page(GFP_TEMPORARY);
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if (!str)
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goto done;
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seq_printf(m, arc_cpu_mumbojumbo(cpu_id, str, PAGE_SIZE));
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seq_printf(m, "Bogo MIPS : \t%lu.%02lu\n",
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loops_per_jiffy / (500000 / HZ),
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(loops_per_jiffy / (5000 / HZ)) % 100);
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seq_printf(m, arc_mmu_mumbojumbo(cpu_id, str, PAGE_SIZE));
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seq_printf(m, arc_cache_mumbojumbo(cpu_id, str, PAGE_SIZE));
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seq_printf(m, arc_extn_mumbojumbo(cpu_id, str, PAGE_SIZE));
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#ifdef CONFIG_SMP
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seq_printf(m, arc_platform_smp_cpuinfo());
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#endif
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free_page((unsigned long)str);
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done:
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seq_printf(m, "\n\n");
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return 0;
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}
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static void *c_start(struct seq_file *m, loff_t *pos)
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{
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/*
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* Callback returns cpu-id to iterator for show routine, NULL to stop.
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* However since NULL is also a valid cpu-id (0), we use a round-about
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* way to pass it w/o having to kmalloc/free a 2 byte string.
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* Encode cpu-id as 0xFFcccc, which is decoded by show routine.
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*/
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return *pos < num_possible_cpus() ? cpu_to_ptr(*pos) : NULL;
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}
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static void *c_next(struct seq_file *m, void *v, loff_t *pos)
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{
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++*pos;
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return c_start(m, pos);
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}
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static void c_stop(struct seq_file *m, void *v)
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{
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}
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const struct seq_operations cpuinfo_op = {
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.start = c_start,
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.next = c_next,
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.stop = c_stop,
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.show = show_cpuinfo
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};
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static DEFINE_PER_CPU(struct cpu, cpu_topology);
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static int __init topology_init(void)
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{
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int cpu;
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for_each_present_cpu(cpu)
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register_cpu(&per_cpu(cpu_topology, cpu), cpu);
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return 0;
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}
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subsys_initcall(topology_init);
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