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[ Upstream commit b959b97860d0fee8c8f6a3e641d3c2ad76eab6be ] On A20R machines the interrupt pending bits in cause register need to be updated by requesting the chipset to do it. This needs to be done to find the interrupt cause and after interrupt service. In commit |
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a20r.c | ||
eisa.c | ||
irq.c | ||
Makefile | ||
pcimt.c | ||
pcit.c | ||
Platform | ||
reset.c | ||
rm200.c | ||
setup.c | ||
time.c |