Commit graph

15 commits

Author SHA1 Message Date
Jeff Mahoney
5fb4d2525b staging: add dependencies on PCI for drivers that require it
This patch adds PCI dependencies to staging drivers that require it.

Signed-off-by: Jeff Mahoney <jeffm@suse.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-08-07 16:12:03 -07:00
Dongxiao Xu
afcf462a1f Staging: heci: fix the problem that file_ext->state should be protected by device_lock
While access file_ext->state, we should use device_lock to protect it. The
original codes miss this in some places.

Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-06-19 11:00:55 -07:00
Dongxiao Xu
8d1c50e982 Staging: heci: do not print error when heci_bh_handler is already on workqueue
schedule_work returns 0, if the work is already on the work_queue, else
returns non-zero. Do not print error message if heci_bh_handlerwork was
already on queue.

Signed-off-by: Nikanth Karthikesan <knikanth@suse.de>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-06-19 11:00:55 -07:00
Dongxiao Xu
ad914a3ec5 Staging: heci: fix setting h_is bit in h_csr register
Host software could issue interrupts to ME firmware, using H_IG bit. While
Setting H_IG bit, host software should preserve all the other bits in H_CSR
unchanged. In the original function which sets H_CSR register, they first read
the register, then set some bits, and write the whole 32bits back to the
register. And that the special behavior of H_IS (write-one-to-zero) causes problem.
This patch fixes the issue in the following ways:

 - Modify heci_set_csr_register() function so that it doesn't change H_IS bit.
 - Add interface heci_csr_clear_his() to clear H_IS bit. This function is called
   after H_IS checking (dev->host_hw_state & H_IS == H_IS).
 - In original heci_csr_disable_interrupts() function, it not only clears H_IE
   bit, sometimes it also clears H_IS bit. This patch separates the two parts.
 - Avoid calling write_heci_register() function to set H_CSR register directly,
   and instead using heci_set_csr_register() function

Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-06-19 11:00:55 -07:00
Dongxiao Xu
52b855600c Staging: heci: fix typos and add wait after disconnect
- Fix typo for enum HECI_WRITE.
 - Fix timeout issue. If the time period is greater or equal 15s, it's timeout.
 - Add 10ms wait time after disconnect, to ensure that hardware is ready.
   Otherwise in the next time connection, hardware resource may be busy.

Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-06-19 11:00:55 -07:00
Dongxiao Xu
58b25a63a1 Staging: heci: fix softirq safe to unsafe spinlock issue
When spinlock is nested, and the outside one is spin_lock_bh, the inner
spinlock should also be spin_lock_bh, otherwise it will bring softirq-safe
to softirq-unsafe lock conversion.

Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-06-19 11:00:55 -07:00
Dongxiao Xu
72abd22883 Staging: heci: fix spinlock order mess of device_lock and read_io_lock
In orginal code, the device_lock and read_io_lock is mess order when nested,
which may bring dead lock. This patch unify the spinlock order of device_lock
and read_io_lock. First acquire device_lock, then read_io_lock.

Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-06-19 11:00:55 -07:00
Dongxiao Xu
171df63819 Staging: heci: fix wrong order of device_lock and file_lock
When the two locks are nested, the code should always first acquire file_lock,
and then acquire device_lock in order not to generate dead-lock race.

Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-06-19 11:00:55 -07:00
Dongxiao Xu
36e844671c Staging: heci: fix userspace pointer mess
Fix userspace pointer mess.
 - In memcmp(), dest and src pointer should be both in kernel space.
 - Add (void __user *) modification before userspace pointer.

Signed-off-by: Dongxiao Xu <dongxiao.xu@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-06-19 11:00:54 -07:00
Huang Weiyi
727cbafa51 Staging: remove unused #include <linux/version.h>'s
Remove unused #include <linux/version.h>'s.

Signed-off-by: Huang Weiyi <weiyi.huang@gmail.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-06-19 11:00:36 -07:00
Greg Kroah-Hartman
21a6a6e9f8 Staging: heci: add TODO file
List some of the remaining issues in the code.

Cc: Anas Nashif <anas.nashif@intel.com>
Cc: Marcin Obara <marcin.obara@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-03 14:54:24 -07:00
Greg Kroah-Hartman
c4739ea63c Staging: heci: fix some sparse warnings
This resolves a lot of the more obvious sparse warnings in the code.

There still are some major problems in the ioctl handlers dealing with
user and kernel pointers that this patch does not resolve, that needs to
be addressed still.

Also, the locking seems to be a bit strange in places, which sparse
points out, that too need to be resolved.

Cc: Anas Nashif <anas.nashif@intel.com>
Cc: Marcin Obara <marcin.obara@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-03 14:54:24 -07:00
Greg Kroah-Hartman
bc154a3862 Staging: heci: fix checkpatch warnings
This resolves the outstanding scripts/checkpatch.pl warnings

Cc: Anas Nashif <anas.nashif@intel.com>
Cc: Marcin Obara <marcin.obara@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-03 14:54:24 -07:00
Greg Kroah-Hartman
441926795d Staging: heci: remove kcompat.h
It's not needed now that we are now in the main kernel tree.

Cc: Anas Nashif <anas.nashif@intel.com>
Cc: Marcin Obara <marcin.obara@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-03 14:54:24 -07:00
Marcin Obara
d52b3d9c72 Staging: add heci driver
The Intel Management Engine Interface (aka HECI: Host Embedded
Controller Interface ) enables communication between the host OS and
the Management Engine firmware. MEI is bi-directional, and either the
host or Intel AMT firmware can initiate transactions.

The core hardware architecture of Intel Active Management Technology
(Intel AMT) is resident in firmware. The micro-controller within the
chipset's graphics and memory controller (GMCH) hub houses the
Management Engine (ME) firmware, which implements various services
on behalf of management applications.

Some of the ME subsystems that can be access via MEI driver:

- Intel(R) Quiet System Technology (QST) is implemented as a firmware
subsystem  that  runs in the ME.  Programs that wish to expose the
health monitoring and fan speed control capabilities of Intel(R) QST
will need to use the MEI driver to communicate with the ME sub-system.
- ASF is the "Alert Standard Format" which is an DMTF manageability
standard. It is implemented in the PC's hardware and firmware, and is
managed from a remote console.

Most recent Intel desktop chipsets have one or more of the above ME
services. The MEI driver will make it possible to support the above
features on Linux and provides applications access to the ME and it's
features.

Signed-off-by: Anas Nashif <anas.nashif@intel.com>
Signed-off-by: Marcin Obara <marcin.obara@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
2009-04-03 14:54:24 -07:00