Commit graph

4555 commits

Author SHA1 Message Date
Thomas Langer
730fa039f1 MIPS: lantiq: fix cmdline parsing
The code tested if the KSEG1 mapped address of argv was != 0. We need to use
CPHYSADDR instead to make the conditional actually work.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3722/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:22 +02:00
Thomas Langer
7705f6867b MIPS: lantiq: fix early printk
The code was using a 32bit write operations in the early_printk code. This
resulted in 3 zero bytes also being written to the serial port. This patch
changes the memory access to 8bit.

Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3721/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:22 +02:00
John Crispin
a8d096ef78 MIPS: lantiq: add ipi handlers to make vsmp work
Add IPI handlers to the interrupt code. This patch makes MIPS_MT_SMP work
on lantiq socs. The code is based on the malta implementation.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3704/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:21 +02:00
John Crispin
59c1157984 MIPS: lantiq: enable oprofile support on lantiq targets
This patch sets the performance counters irq on Lantiq SoCs.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3720/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:21 +02:00
John Crispin
16f70b561d MIPS: lantiq: clear all irqs properly on boot
Due to missing brackets, the irq modules were not properly reset on boot.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3719/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:21 +02:00
John Crispin
3489d72d15 MIPS: remove unused prototype kgdb_config
Trivial fix that removes an orphaned prototype.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3701/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:20 +02:00
John Crispin
c9a3b7e4a3 MIPS: add clkdev.h
For clock device lookup tables to work on MIPS, we need to provide this
architecture specific header file.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3700/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:20 +02:00
John Crispin
40e91aec7d MIPS: parse chosen node on boot
Call early_init_devtree from inside __dt_setup_arch to allow parsing of the
chosen node.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3718/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:20 +02:00
Ralf Baechle
7d6168e576 MIPS: Add helper function to allow platforms to point at a DTB.
Add __dt_setup_arch() that can be called to load a builtin DT.
Additionally we add a macro to allow loading a specific symbol
from the __dtb_* section.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3715/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:19 +02:00
Ralf Baechle
0a4c531c21 MIPS: Provide pci_address_to_pio.
Without I/O ports won't work.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3697/
2012-05-15 17:49:19 +02:00
John Crispin
a48cf37ac8 MIPS: pci: parse memory ranges from devicetree
Implement pci_load_of_ranges on MIPS. Due to lack of test hardware only 32bit
bus width is supported. This function is based on pci_process_bridge_OF_ranges
from powerpc.

Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3729/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:19 +02:00
Felix Fietkau
3572a2c37f MIPS: make oprofile use cp0_perfcount_irq if it is set
Make the oprofile code use the performance counters irq.

Signed-off-by: Felix Fietkau <nbd@openwrt.org>
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3723/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:19 +02:00
Gabor Juhos
9598111f49 MIPS: ath79: add initial support for the Atheros DB120 board
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3517/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:11 +02:00
Gabor Juhos
ec9502599c MIPS: ath79: add PCI registration code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3516/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:11 +02:00
Gabor Juhos
67644c547f MIPS: ath79: add PCI_AR724X Kconfig symbol
The AR724X specific PCI code can be used for the
AR934X SoCs, however it can be selected only if
SOC_AR724X is set.

Introduce a new Kconfig symbol in order to be able
to use the code for AR934X as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3514/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:11 +02:00
Gabor Juhos
574d6e70ea MIPS: ath79: add WMAC registration code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3513/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:10 +02:00
Gabor Juhos
9800bdc797 MIPS: ath79: register UART device for AR934X SoCs
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3512/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:10 +02:00
Gabor Juhos
42184768b3 MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3511/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:09 +02:00
Gabor Juhos
fce5cc6e0d MIPS: ath79: add IRQ handling code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3510/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:09 +02:00
Gabor Juhos
4dbcbdf813 MIPS: ath79: rework IP2/IP3 interrupt handling
The current implementation assumes that flushing the
DDR writeback buffer is required for IP2/IP3 interrupts,
however this is not true for all SoCs.

Use SoC specific IP2/IP3 handlers instead of flushing
the buffers in the dispatcher code.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3509/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:08 +02:00
Gabor Juhos
5b5b544ed3 MIPS: ath79: add GPIO support code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3508/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:08 +02:00
Gabor Juhos
8889612b3e MIPS: ath79: add clock initialization code for AR934X
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3507/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:08 +02:00
Gabor Juhos
d84114660a MIPS: ath79: add SoC detection code for AR934X
Also add 'soc_is_ar934[124x]' helper functions and a Kconfig
symbol for the AR934X SoCs.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3506/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:07 +02:00
Gabor Juhos
80a7ed81a8 MIPS: ath79: sort case statements in ath79_detect_sys_type
Sort the case statements alphabetically in order to improve
readability.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3505/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:07 +02:00
Gabor Juhos
703327ddcc MIPS: ath79: add early_printk support for AR934X
The patch allows to see kernel messages on AR934X SoCs in
early boot stage.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
Cc: linux-mips@linux-mips.org
Cc: mcgrof@infradead.org
Patchwork: https://patchwork.linux-mips.org/patch/3504/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:07 +02:00
Gabor Juhos
e9b62e8ef9 MIPS: ath79: update copyright headers of PCI related files
Add copyright records according to the recent changes in
the PCI code. Also fix up the descriptions.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3503/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:07 +02:00
Gabor Juhos
1f3a92de2a MIPS: ath79: register PCI controller on the PB44 board
The PB44 reference board has two miniPCI slots. Register
the PCI controller to make those usable.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3502/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:06 +02:00
Gabor Juhos
52c28be371 MIPS: ath79: remove ar724x_pci_add_data function
The variables set by this function are not used anymore.
Remove the function and the relevant variables as well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3501/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:06 +02:00
Gabor Juhos
d22ce25f87 MIPS: ath79: allow to use SoC specific PCI IRQ maps
The PCI controllers in the AR71XX and in the
AR724X SoCs are different, and both of them
uses different IRQ wiring.

The patch modifies the 'pcibios_map_irq' function
in order to allow to use different IRQ maps for
the different SoCs. The patch also adds a function,
which lets the board setup code to override the
default IRQ map.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3500/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:06 +02:00
Gabor Juhos
f8365ec4e1 MIPS: ath79: add support for the PCI host controller of the AR71XX SoCs
The Atheros AR71XX SoCs have a built-in PCI Host Controller.
This patch adds a driver for that, and modifies the relevant
files in order to allow to register the PCI controller from
board specific setup.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3498/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:05 +02:00
Gabor Juhos
a68ad4d892 MIPS: ath79: allow to use board specific pci_plat_dev_init functions
Th current implementation causes NULL pointer dereference
if 'pci_data' is not set:

pci 0000:00:00.0: BAR 0: assigned [mem 0x10000000-0x1000ffff 64bit]
pci 0000:00:00.0: BAR 0: set to [mem 0x10000000-0x1000ffff 64bit] (PCI
address [0x10000000-0x1000ffff])
CPU 0 Unable to handle kernel paging request at virtual address 00000000, epc == 802daca0, ra == 802e78a4
Oops[#1]:
Cpu 0
$ 0   : 00000000 80420000 00000000 00000000
$ 4   : 00000000 00000000 00000001 00000001
$ 8   : 00000001 0000032c 81c54700 00000001
$12   : 0000032d 0000000f 00000000 ffffffff
$16   : 81c14c00 00000001 802dac74 80195f98
$20   : 802ea050 00000000 00000000 00000000
$24   : 00000003 800617f0
$28   : 81c20000 81c21e70 00000000 802e78a4
Hi    : 00000000
Lo    : 4190ab00
epc   : 802daca0 0x802daca0
    Not tainted
ra    : 802e78a4 0x802e78a4
Status: 1000c003    KERNEL EXL IE
Cause : 00800008
BadVA : 00000000
PrId  : 00019374 (MIPS 24Kc)
Modules linked in:
Process swapper (pid: 1, threadinfo=81c20000, task=81c18000, tls=00000000)
Stack : 00000000 8027d5d8 802e8ae0 00000000 01000000 802e8b5c 81c50600 00000000
        802ff290 00000000 80420000 802ea0bc 00000000 00000000 80420000 802ff290
        80420000 80060930 33390000 00000000 00002308 80140a80 00000028 802d0000
        00000000 800ba024 802ff004 802ff0c8 802ff290 00000000 00000000 00000000
        00000000 802d897c 01234567 7f827068 00000000 0045f798 00460000 00000000

This can be avoided by calling the 'ar724x_pci_add_data'
function from the board specific setup code. However it
makes no sense to use that function for every board,
especially when the board does not needs to set the
platform_data field of any PCI device.

The patch allows the board setup code to specify a board
specific function if that is required.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3499/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:05 +02:00
Gabor Juhos
881b6ef0cc MIPS: ath79: get rid of some ifdefs in mach-ubnt-xm.c
Remove a superfluous ifdef around an include. Also
reorganize the board setup code a bit, so another
ifdef can be removed.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3497/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:04 +02:00
Gabor Juhos
4c07c7dfa0 MIPS: ath79: add PCI IRQ handling code for AR724X SoCs
The PCI Host Controller of the AR724x SoC has a
built-in IRQ controller. The current code does
not supports that, so the IRQ lines wired to this
controller are not usable. This leads to failed
'request_irq' calls:

  ath9k 0000:00:00.0: request_irq failed
  ath9k: probe of 0000:00:00.0 failed with error -89

This patch adds support for the IRQ controller
in order to make PCI IRQs work.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc:  linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3496/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:04 +02:00
Gabor Juhos
93ef85b559 MIPS: ath79: fix a wrong IRQ number
The Ubiquiti XM board setup code uses an invalid
IRQ number, because it if above of NR_IRQS. This
leads to failed 'request_irq' calls:

  ath9k 0000:00:00.0: request_irq failed
  ath9k: probe of 0000:00:00.0 failed with error -22

Preserve some IRQ numbers for the built-in IRQ
controller of PCI host controllers in the
AR71XX/AR724X SoCs, and use the correct IRQ
number in the board setup code.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3495/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:03 +02:00
Gabor Juhos
6015a856f1 MIPS: ath79: add a workaround for a PCI controller bug in AR7240 SoCs
The PCI controller of the AR724X SoCs has a hardware
bag. If the BAR0 register of the PCI device is set to
the proper base address, the memory address space of
the device is not accessible.

When the device driver tries to access the memory
address space of the PCI device, it leads to data
bus error, similiar to this:

Data bus error, epc == 801f69a0, ra == 801f698c
Oops[#1]:
Cpu 0
$ 0   : 00000000 00000061 deadbeef 000000ff
$ 4   : 00000000 000000ff 00000014 00000000
$ 8   : ff000000 fffffffc 00000000 00000000
$12   : 000001f5 00000006 00000000 6e637920
$16   : 81ca4000 81ca0260 81ca4000 804d70f0
$20   : fffffff4 0000002b 803ad4c4 00000000
$24   : 00000003 00000000
$28   : 81c20000 81c21c60 00000000 801f698c
Hi    : 00000000
Lo    : 00000000
epc   : 801f69a0 ath9k_hw_init+0xd0/0xa70
    Not tainted
ra    : 801f698c ath9k_hw_init+0xbc/0xa70
Status: 1000c103    KERNEL EXL IE
Cause : 1080001c
PrId  : 00019374 (MIPS 24Kc)
Modules linked in:
Process swapper (pid: 1, threadinfo=81c20000, task=81c18000, tls=00000000)
Stack : 00000000 00000000 00000000 00000000 81c21c78 81ca0260 00000000 804d70f0
        81ca0260 81c21cc0 81ca0e80 81ca0260 81ca4000 804d70f0 fffffff4 0000002b
        803ad4c4 00000000 00000000 801e3ae8 81c9d080 81ca0e80 b0000000 800b9b9c
        00000008 81c9d000 8031aeb0 802d38a0 00000000 81c14c00 81c14c60 00000000
        81ca0e80 81ca0260 b0000000 801f08a4 81c9c820 81c21d48 81c9c820 80144320
        ...
Call Trace:
[<801f69a0>] ath9k_hw_init+0xd0/0xa70
[<801e3ae8>] ath9k_init_device+0x174/0x680
[<801f08a4>] ath_pci_probe+0x27c/0x380
[<8019e490>] pci_device_probe+0x74/0x9c
[<801bfadc>] driver_probe_device+0x9c/0x1b4
[<801bfcb0>] __driver_attach+0xbc/0xc4
[<801bea0c>] bus_for_each_dev+0x5c/0x98
[<801bf394>] bus_add_driver+0x1d0/0x2a4
[<801c0364>] driver_register+0x8c/0x16c
[<8019e72c>] __pci_register_driver+0x4c/0xe4
[<803d3d40>] ath9k_init+0x3c/0x88
[<80060930>] do_one_initcall+0x3c/0x1cc
[<803c297c>] kernel_init+0xa4/0x138
[<80063c04>] kernel_thread_helper+0x10/0x18

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3494/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:03 +02:00
Gabor Juhos
64adb6bb62 MIPS: ath79: fix broken ar724x_pci_{read,write} functions
The current ar724x_pci_{read,write} functions are
broken. Due to that, pci_read_config_byte returns
with bogus values, and pci_write_config_{byte,word}
unconditionally clears the accessed PCI configuration
registers instead of changing the value of them.

The patch fixes the broken functions, thus the PCI
configuration space can be accessed correctly.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3493/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:03 +02:00
Gabor Juhos
ffdce46682 MIPS: ath79: remove superfluous alignment checks from pci-ar724x.c
The alignment of the 'where' parameters are checked
in the core PCI code already.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3492/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:03 +02:00
Gabor Juhos
c198441a3f MIPS: ath79: use io-accessor macros in pci-ar724x.c
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3491/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:02 +02:00
Gabor Juhos
d624bd3cf7 MIPS: ath79: replace ath724x to ar724x
Replace the 'ath724x' to 'ar724x' in function, variable and
structure names to reflect the name of the real SoC.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3490/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:02 +02:00
Gabor Juhos
692183ef12 MIPS: ath79: rename pci-ath724x.c to make it reflect the real SoC name
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3489/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:01 +02:00
Gabor Juhos
6335aef59c MIPS: ath79: add a common PCI registration function
The current code unconditionally registers the AR724X
specific PCI controller, even if the kernel is running
on a different SoC.

Add a common function for PCI controller registration,
and only register the AR724X PCI controller if the kernel
is running on an AR724X SoC.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3488/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:01 +02:00
Gabor Juhos
659243ccaf MIPS: ath79: make ath724x_pcibios_init visible for external code
Signed-off-by: René Bolldorf <xsecute@googlemail.com>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3487/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:01 +02:00
Gabor Juhos
3a6208df8e MIPS: ath79: rename pci-ath724x.h
The declared function in this header file is used by the
ath79 platform code only. Move the header to the platform
directory.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3486/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:01 +02:00
Gabor Juhos
e2dbdc436b MIPS: ath79: separate common PCI code
The 'pcibios_map_irq' and 'pcibios_plat_dev_init'
are common functions and only instance one of them
can be present in a single kernel.

Currently these functions can be built only if the
CONFIG_SOC_AR724X option is selected. However the
ath79 platform contain support for the AR71XX SoCs,.
The AR71XX SoCs have a differnet PCI controller,
and those will require a different code.

Move the common PCI code into a separeate file in
order to be able to use that with other SoCs as
well.

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Acked-by: René Bolldorf <xsecute@googlemail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3485/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:00 +02:00
Thomas Meyer
97bf7a1900 MIPS: ath79: Use kmemdup rather than duplicating its implementation
The semantic patch that makes this change is available
in scripts/coccinelle/api/memdup.cocci.

Signed-off-by: Thomas Meyer <thomas@m3y3r.de>
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3483/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:49:00 +02:00
Paul Gortmaker
baab01b266 MIPS: Don't use module.h just to export symbols in asm/uasm.h
Putting module.h into widely used headers just bogs cpp down with reams of
stuff that isn't needed.  Here, we only need visibility to EXPORT_SYMBOL.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3450/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:48:51 +02:00
Paul Gortmaker
4ca98d399e MIPS: Delete bogus module.h usage in termios.h
There is no need for this.  Removing it causes a small amount of fallout
(shown below) due to a few implicit header presence assumptions that are
easily fixed.

arch/mips/include/asm/termios.h:103: error: implicit declaration of function 'access_ok'
arch/mips/include/asm/module.h:17: error: expected specifier-qualifier-list before 'Elf64_Addr'

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3449/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:48:51 +02:00
Paul Gortmaker
f9ded5692c MIPS: Fix several implicit uses of export.h/module.h
These will show up as a build failure once we clean up a
misuse of module.h in the mips termios header.

Uses export.h: (EXPORT_SYMBOL)
   arch/mips/cavium-octeon/setup.c
   arch/mips/pmc-sierra/yosemite/setup.c
   arch/mips/rb532/devices.c
   arch/mips/sni/setup.c

Uses module.h: (symbol_get/put)
   arch/mips/alchemy/devboards/db1200.c

Uses module.h: (print_modules)
   arch/mips/kernel/traps.c

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3448/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:48:50 +02:00
Steven J. Hill
03751e7924 MIPS: Code formatting fixes.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:48:39 +02:00
Jonas Gorski
442209f31d MIPS: BCM63XX: Add missing include for bcm63xx_gpio.h
bcm63xx_gpio.h uses macros defined in bcm63xx_cpu.h without including it,
leading to the following build failure:

  CC [M]  drivers/mmc/core/cd-gpio.o
In file included from arch/mips/include/asm/mach-bcm63xx/gpio.h:4:0,
                 from arch/mips/include/asm/gpio.h:4,
                 from include/linux/gpio.h:30,
                 from drivers/mmc/core/cd-gpio.c:12:

arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h: In function 'bcm63xx_gpio_count':
arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:10:2: error: implicit declaration of function 'bcm63xx_get_cpu_id'
arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:11:7: error: 'BCM6358_CPU_ID' undeclared (first use in this function)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:11:7: note: each undeclared identifier is reported only once for each function it appears in
arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:13:7: error: 'BCM6338_CPU_ID' undeclared (first use in this function)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:15:7: error: 'BCM6345_CPU_ID' undeclared (first use in this function)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:17:7: error: 'BCM6368_CPU_ID' undeclared (first use in this function)
arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h:19:7: error: 'BCM6348_CPU_ID' undeclared (first use in this function)

make[7]: *** [drivers/mmc/core/cd-gpio.o] Error 1

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Cc: stable@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: Maxime Bizon <mbizon@freebox.fr>
Cc: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-05-15 17:47:52 +02:00